git.sur5r.net Git - u-boot/blob - arch/arm/mach-uniphier/memconf/memconf-pxs2.c

   1 /*
   2  * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <linux/err.h>
   9 #include <linux/io.h>
  10 #include <linux/sizes.h>
  11
  12 #include "../init.h"
  13 #include "../sg-regs.h"
  14
  15 int uniphier_pxs2_memconf_init(const struct uniphier_board_data *bd)
  16 {
  17         u32 tmp;
  18         unsigned long size_per_word;
  19
  20         tmp = readl(SG_MEMCONF);
  21
  22         tmp &= ~(SG_MEMCONF_CH2_SZ_MASK | SG_MEMCONF_CH2_NUM_MASK);
  23
  24         switch (bd->dram_ch[2].width) {
  25         case 16:
  26                 tmp |= SG_MEMCONF_CH2_NUM_1;
  27                 size_per_word = bd->dram_ch[2].size;
  28                 break;
  29         case 32:
  30                 tmp |= SG_MEMCONF_CH2_NUM_2;
  31                 size_per_word = bd->dram_ch[2].size >> 1;
  32                 break;
  33         default:
  34                 pr_err("error: unsupported DRAM Ch2 width\n");
  35                 return -EINVAL;
  36         }
  37
  38         /* Set DDR size */
  39         switch (size_per_word) {
  40         case SZ_64M:
  41                 tmp |= SG_MEMCONF_CH2_SZ_64M;
  42                 break;
  43         case SZ_128M:
  44                 tmp |= SG_MEMCONF_CH2_SZ_128M;
  45                 break;
  46         case SZ_256M:
  47                 tmp |= SG_MEMCONF_CH2_SZ_256M;
  48                 break;
  49         case SZ_512M:
  50                 tmp |= SG_MEMCONF_CH2_SZ_512M;
  51                 break;
  52         case SZ_1G:
  53                 tmp |= SG_MEMCONF_CH2_SZ_1G;
  54                 break;
  55         default:
  56                 pr_err("error: unsupported DRAM Ch2 size\n");
  57                 return -EINVAL;
  58         }
  59
  60         if (size_per_word)
  61                 tmp &= ~SG_MEMCONF_CH2_DISABLE;
  62         else
  63                 tmp |= SG_MEMCONF_CH2_DISABLE;
  64
  65         writel(tmp, SG_MEMCONF);
  66
  67         return 0;
  68 }