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ARM: uniphier: allow to enable multiple SoCs
[u-boot] / arch / arm / mach-uniphier / sbc / sbc-ph1-pro4.c
1 /*
2  * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6
7 #include <common.h>
8 #include <linux/io.h>
9 #include <mach/init.h>
10 #include <mach/sbc-regs.h>
11 #include <mach/sg-regs.h>
12
13 int ph1_pro4_sbc_init(const struct uniphier_board_data *bd)
14 {
15         /*
16          * Only CS1 is connected to support card.
17          * BKSZ[1:0] should be set to "01".
18          */
19         writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL10);
20         writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL11);
21         writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12);
22         writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14);
23
24         if (boot_is_swapped()) {
25                 /*
26                  * Boot Swap On: boot from external NOR/SRAM
27                  * 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff.
28                  *
29                  * 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank
30                  * 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals
31                  */
32                 writel(0x0000bc01, SBBASE0);
33         } else {
34                 /*
35                  * Boot Swap Off: boot from mask ROM
36                  * 0x40000000-0x41ffffff: mask ROM
37                  * 0x42000000-0x43efffff: memory bank (31MB)
38                  * 0x43f00000-0x43ffffff: peripherals (1MB)
39                  */
40                 writel(0x0000be01, SBBASE0); /* dummy */
41                 writel(0x0200be01, SBBASE1);
42         }
43
44         return 0;
45 }