git.sur5r.net Git - u-boot/blob - arch/arm/mach-uniphier/sbc/sbc-proxstream2.c

   1 /*
   2  * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <linux/io.h>
   8 #include <mach/init.h>
   9 #include <mach/sbc-regs.h>
  10 #include <mach/sg-regs.h>
  11
  12 int proxstream2_sbc_init(const struct uniphier_board_data *bd)
  13 {
  14         /* necessary for ROM boot ?? */
  15         /* system bus output enable */
  16         writel(0x17, PC0CTRL);
  17
  18         /*
  19          * Only CS1 is connected to support card.
  20          * BKSZ[1:0] should be set to "01".
  21          */
  22         writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL10);
  23         writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL11);
  24         writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12);
  25         writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14);
  26
  27         if (boot_is_swapped()) {
  28                 /*
  29                  * Boot Swap On: boot from external NOR/SRAM
  30                  * 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff.
  31                  *
  32                  * 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank
  33                  * 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals
  34                  */
  35                 writel(0x0000bc01, SBBASE0);
  36         } else {
  37                 /*
  38                  * Boot Swap Off: boot from mask ROM
  39                  * 0x40000000-0x41ffffff: mask ROM
  40                  * 0x42000000-0x43efffff: memory bank (31MB)
  41                  * 0x43f00000-0x43ffffff: peripherals (1MB)
  42                  */
  43                 writel(0x0000be01, SBBASE0); /* dummy */
  44                 writel(0x0200be01, SBBASE1);
  45         }
  46
  47         return 0;
  48 }