2 * Copyright (C) 2005-2006 Atmel Corporation
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 #ifndef __AT32AP7000_HARDWARE_H__
23 #define __AT32AP7000_HARDWARE_H__
25 /* Internal and external memories */
26 #define EBI_SRAM_CS0_BASE 0x00000000
27 #define EBI_SRAM_CS0_SIZE 0x04000000
28 #define EBI_SRAM_CS4_BASE 0x04000000
29 #define EBI_SRAM_CS4_SIZE 0x04000000
30 #define EBI_SRAM_CS2_BASE 0x08000000
31 #define EBI_SRAM_CS2_SIZE 0x04000000
32 #define EBI_SRAM_CS3_BASE 0x0c000000
33 #define EBI_SRAM_CS3_SIZE 0x04000000
34 #define EBI_SRAM_CS1_BASE 0x10000000
35 #define EBI_SRAM_CS1_SIZE 0x10000000
36 #define EBI_SRAM_CS5_BASE 0x20000000
37 #define EBI_SRAM_CS5_SIZE 0x04000000
39 #define EBI_SDRAM_BASE EBI_SRAM_CS1_BASE
40 #define EBI_SDRAM_SIZE EBI_SRAM_CS1_SIZE
42 #define INTERNAL_SRAM_BASE 0x24000000
43 #define INTERNAL_SRAM_SIZE 0x00008000
45 /* Devices on the High Speed Bus (HSB) */
46 #define LCDC_BASE 0xFF000000
47 #define DMAC_BASE 0xFF200000
48 #define USB_FIFO 0xFF300000
50 /* Devices on Peripheral Bus A (PBA) */
51 #define ATMEL_BASE_SPI0 0xFFE00000
52 #define ATMEL_BASE_SPI1 0xFFE00400
53 #define ATMEL_BASE_TWI0 0xFFE00800
54 #define ATMEL_BASE_USART0 0xFFE00C00
55 #define ATMEL_BASE_USART1 0xFFE01000
56 #define ATMEL_BASE_USART2 0xFFE01400
57 #define ATMEL_BASE_USART3 0xFFE01800
58 #define ATMEL_BASE_SSC0 0xFFE01C00
59 #define ATMEL_BASE_SSC1 0xFFE02000
60 #define ATMEL_BASE_SSC2 0xFFE02400
61 #define ATMEL_BASE_PIOA 0xFFE02800
62 #define ATMEL_BASE_PIOB 0xFFE02C00
63 #define ATMEL_BASE_PIOC 0xFFE03000
64 #define ATMEL_BASE_PIOD 0xFFE03400
65 #define ATMEL_BASE_PIOE 0xFFE03800
66 #define ATMEL_BASE_PSIF 0xFFE03C00
68 /* Devices on Peripheral Bus B (PBB) */
69 #define ATMEL_BASE_SM 0xFFF00000
70 #define ATMEL_BASE_INTC 0xFFF00400
71 #define ATMEL_BASE_HMATRIX 0xFFF00800
72 #define ATMEL_BASE_TIMER0 0xFFF00C00
73 #define ATMEL_BASE_TIMER1 0xFFF01000
74 #define ATMEL_BASE_PWM 0xFFF01400
75 #define ATMEL_BASE_MACB0 0xFFF01800
76 #define ATMEL_BASE_MACB1 0xFFF01C00
77 #define ATMEL_BASE_DAC 0xFFF02000
78 #define ATMEL_BASE_MMCI 0xFFF02400
79 #define ATMEL_BASE_AUDIOC 0xFFF02800
80 #define ATMEL_BASE_HISI 0xFFF02C00
81 #define ATMEL_BASE_USB 0xFFF03000
82 #define ATMEL_BASE_HSMC 0xFFF03400
83 #define ATMEL_BASE_HSDRAMC 0xFFF03800
84 #define ATMEL_BASE_ECC 0xFFF03C00
86 #endif /* __AT32AP7000_HARDWARE_H__ */