2 * Copyright (c) 2011 The Chromium OS Authors.
3 * See file CREDITS for list of people who contributed to this
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 #ifndef __AVR32_CACHE_H__
23 #define __AVR32_CACHE_H__
26 * Since the AVR32 architecture has a queryable cacheline size with a maximum
27 * value of 256 we set the DMA buffer alignemnt requirement to this maximum
28 * value. The board config can override this if it knows that the cacheline
29 * size is a smaller value. AVR32 boards use the CONFIG_SYS_DCACHE_LINESZ
30 * macro to specify cache line size, so if it is set we use it instead.
32 #ifdef CONFIG_SYS_CACHELINE_SIZE
33 #define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE
34 #elif defined(CONFIG_SYS_DCACHE_LINESZ)
35 #define ARCH_DMA_MINALIGN CONFIG_SYS_DCACHE_LINESZ
37 #define ARCH_DMA_MINALIGN 256
40 #endif /* __AVR32_CACHE_H__ */