2 * serial.h - common serial defines for early debug and serial driver.
3 * any functions defined here must be always_inline since
4 * initcode cannot have function calls.
6 * Copyright (c) 2004-2007 Analog Devices Inc.
8 * Licensed under the GPL-2 or later.
11 #ifndef __BFIN_CPU_SERIAL_H__
12 #define __BFIN_CPU_SERIAL_H__
14 #include <asm/blackfin.h>
15 #include <asm/mach-common/bits/uart.h>
17 #ifndef CONFIG_UART_CONSOLE
18 # define CONFIG_UART_CONSOLE 0
21 #ifdef CONFIG_DEBUG_EARLY_SERIAL
22 # define BFIN_DEBUG_EARLY_SERIAL 1
24 # define BFIN_DEBUG_EARLY_SERIAL 0
29 #include <asm/portmux.h>
31 #define LOB(x) ((x) & 0xFF)
32 #define HIB(x) (((x) >> 8) & 0xFF)
34 #if defined(__ADSPBF50x__) || defined(__ADSPBF54x__)
35 # define BFIN_UART_HW_VER 2
37 # define BFIN_UART_HW_VER 1
41 * All Blackfin system MMRs are padded to 32bits even if the register
42 * itself is only 16bits. So use a helper macro to streamline this.
44 #define __BFP(m) u16 m; u16 __pad_##m
45 struct bfin_mmr_serial {
46 #if BFIN_UART_HW_VER == 2
83 #define __PASTE_UART(num, pfx, sfx) pfx##num##_##sfx
84 #define _PASTE_UART(num, pfx, sfx) __PASTE_UART(num, pfx, sfx)
85 #define MMR_UART(mmr) _PASTE_UART(CONFIG_UART_CONSOLE, UART, DLL)
86 #define P_UART(pin) _PASTE_UART(CONFIG_UART_CONSOLE, P_UART, pin)
89 # define UART_DLL MMR_UART(DLL)
91 # if CONFIG_UART_CONSOLE != 0
92 # error CONFIG_UART_CONSOLE must be 0 on parts with only one UART
95 #define pUART ((volatile struct bfin_mmr_serial *)UART_DLL)
97 #if BFIN_UART_HW_VER == 2
98 # define ACCESS_LATCH()
99 # define ACCESS_PORT_IER()
101 # define ACCESS_LATCH() \
102 bfin_write16(&pUART->lcr, bfin_read16(&pUART->lcr) | DLAB)
103 # define ACCESS_PORT_IER() \
104 bfin_write16(&pUART->lcr, bfin_read16(&pUART->lcr) & ~DLAB)
107 __attribute__((always_inline))
108 static inline void serial_do_portmux(void)
110 if (!BFIN_DEBUG_EARLY_SERIAL) {
111 const unsigned short pins[] = { P_UART(RX), P_UART(TX), 0, };
112 peripheral_request_list(pins, "bfin-uart");
116 #if defined(__ADSPBF50x__)
117 # define DO_MUX(port, mux_tx, mux_rx, tx, rx) \
118 bfin_write_PORT##port##_MUX((bfin_read_PORT##port##_MUX() & ~(PORT_x_MUX_##mux_tx##_MASK | PORT_x_MUX_##mux_rx##_MASK)) | PORT_x_MUX_##mux_tx##_FUNC_1 | PORT_x_MUX_##mux_rx##_FUNC_1); \
119 bfin_write_PORT##port##_FER(bfin_read_PORT##port##_FER() | P##port##tx | P##port##rx);
120 switch (CONFIG_UART_CONSOLE) {
121 case 0: DO_MUX(G, 7, 7, 12, 13); break; /* Port G; mux 7; PG12 and PG13 */
122 case 1: DO_MUX(F, 3, 3, 6, 7); break; /* Port F; mux 3; PF6 and PF7 */
125 #elif defined(__ADSPBF51x__)
126 # define DO_MUX(port, mux_tx, mux_rx, tx, rx) \
127 bfin_write_PORT##port##_MUX((bfin_read_PORT##port##_MUX() & ~(PORT_x_MUX_##mux_tx##_MASK | PORT_x_MUX_##mux_rx##_MASK)) | PORT_x_MUX_##mux_tx##_FUNC_2 | PORT_x_MUX_##mux_rx##_FUNC_2); \
128 bfin_write_PORT##port##_FER(bfin_read_PORT##port##_FER() | P##port##tx | P##port##rx);
129 switch (CONFIG_UART_CONSOLE) {
130 case 0: DO_MUX(G, 5, 5, 9, 10); break; /* Port G; mux 5; PG9 and PG10 */
131 case 1: DO_MUX(F, 2, 3, 14, 15); break; /* Port H; mux 2/3; PH14 and PH15 */
134 #elif defined(__ADSPBF52x__)
135 # define DO_MUX(port, mux, tx, rx) \
136 bfin_write_PORT##port##_MUX((bfin_read_PORT##port##_MUX() & ~PORT_x_MUX_##mux##_MASK) | PORT_x_MUX_##mux##_FUNC_3); \
137 bfin_write_PORT##port##_FER(bfin_read_PORT##port##_FER() | P##port##tx | P##port##rx);
138 switch (CONFIG_UART_CONSOLE) {
139 case 0: DO_MUX(G, 2, 7, 8); break; /* Port G; mux 2; PG2 and PG8 */
140 case 1: DO_MUX(F, 5, 14, 15); break; /* Port F; mux 5; PF14 and PF15 */
143 #elif defined(__ADSPBF537__) || defined(__ADSPBF536__) || defined(__ADSPBF534__)
144 const uint16_t func[] = { PFDE, PFTE, };
145 bfin_write_PORT_MUX(bfin_read_PORT_MUX() & ~func[CONFIG_UART_CONSOLE]);
146 bfin_write_PORTF_FER(bfin_read_PORTF_FER() |
147 (1 << P_IDENT(P_UART(RX))) |
148 (1 << P_IDENT(P_UART(TX))));
150 #elif defined(__ADSPBF54x__)
151 # define DO_MUX(port, tx, rx) \
152 bfin_write_PORT##port##_MUX((bfin_read_PORT##port##_MUX() & ~(PORT_x_MUX_##tx##_MASK | PORT_x_MUX_##rx##_MASK)) | PORT_x_MUX_##tx##_FUNC_1 | PORT_x_MUX_##rx##_FUNC_1); \
153 bfin_write_PORT##port##_FER(bfin_read_PORT##port##_FER() | P##port##tx | P##port##rx);
154 switch (CONFIG_UART_CONSOLE) {
155 case 0: DO_MUX(E, 7, 8); break; /* Port E; PE7 and PE8 */
156 case 1: DO_MUX(H, 0, 1); break; /* Port H; PH0 and PH1 */
157 case 2: DO_MUX(B, 4, 5); break; /* Port B; PB4 and PB5 */
158 case 3: DO_MUX(B, 6, 7); break; /* Port B; PB6 and PB7 */
161 #elif defined(__ADSPBF561__)
162 /* UART pins could be GPIO, but they aren't pin muxed. */
164 # if (P_UART(RX) & P_DEFINED) || (P_UART(TX) & P_DEFINED)
165 # error "missing portmux logic for UART"
170 __attribute__((always_inline))
171 static inline void serial_early_init(void)
173 /* handle portmux crap on different Blackfins */
176 /* always enable UART -- avoids anomalies 05000309 and 05000350 */
177 bfin_write16(&pUART->gctl, UCEN);
179 /* Set LCR to Word Lengh 8-bit word select */
180 bfin_write16(&pUART->lcr, WLS_8);
185 __attribute__((always_inline))
186 static inline void serial_early_put_div(uint16_t divisor)
188 /* Set DLAB in LCR to Access DLL and DLH */
192 /* Program the divisor to get the baud rate we want */
193 bfin_write16(&pUART->dll, LOB(divisor));
194 bfin_write16(&pUART->dlh, HIB(divisor));
197 /* Clear DLAB in LCR to Access THR RBR IER */
202 __attribute__((always_inline))
203 static inline uint16_t serial_early_get_div(void)
205 /* Set DLAB in LCR to Access DLL and DLH */
209 uint8_t dll = bfin_read16(&pUART->dll);
210 uint8_t dlh = bfin_read16(&pUART->dlh);
211 uint16_t divisor = (dlh << 8) | dll;
213 /* Clear DLAB in LCR to Access THR RBR IER */
220 /* We cannot use get_sclk() early on as it uses caches in external memory */
221 #if defined(BFIN_IN_INITCODE) || defined(CONFIG_DEBUG_EARLY_SERIAL)
222 # define get_sclk() (CONFIG_CLKIN_HZ * CONFIG_VCO_MULT / CONFIG_SCLK_DIV)
225 __attribute__((always_inline))
226 static inline void serial_early_set_baud(uint32_t baud)
228 /* Translate from baud into divisor in terms of SCLK. The
229 * weird multiplication is to make sure we over sample just
230 * a little rather than under sample the incoming signals.
232 serial_early_put_div((get_sclk() + (baud * 8)) / (baud * 16) - ANOMALY_05000230);
235 #ifndef BFIN_IN_INITCODE
236 __attribute__((always_inline))
237 static inline void serial_early_puts(const char *s)
239 if (BFIN_DEBUG_EARLY_SERIAL) {
240 serial_puts("Early: ");
248 .macro serial_early_init
249 #ifdef CONFIG_DEBUG_EARLY_SERIAL
250 call _serial_initialize;
254 .macro serial_early_set_baud
255 #ifdef CONFIG_DEBUG_EARLY_SERIAL
256 R0.L = LO(CONFIG_BAUDRATE);
257 R0.H = HI(CONFIG_BAUDRATE);
258 call _serial_set_baud;
262 /* Since we embed the string right into our .text section, we need
263 * to find its address. We do this by getting our PC and adding 2
264 * bytes (which is the length of the jump instruction). Then we
265 * pass this address to serial_puts().
267 #ifdef CONFIG_DEBUG_EARLY_SERIAL
268 # define serial_early_puts(str) \
281 # define serial_early_puts(str)