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Blackfin: punt old *p style volatile MMR defines
[u-boot] / arch / blackfin / include / asm / mach-bf561 / BF561_cdef.h
1 /* DO NOT EDIT THIS FILE
2  * Automatically generated by generate-cdef-headers.xsl
3  * DO NOT EDIT THIS FILE
4  */
5
6 #ifndef __BFIN_CDEF_ADSP_BF561_proc__
7 #define __BFIN_CDEF_ADSP_BF561_proc__
8
9 #include "../mach-common/ADSP-EDN-core_cdef.h"
10
11 #include "../mach-common/ADSP-EDN-DUAL-CORE-extended_cdef.h"
12
13 #define bfin_read_SRAM_BASE_ADDR()     bfin_read32(SRAM_BASE_ADDR)
14 #define bfin_write_SRAM_BASE_ADDR(val) bfin_write32(SRAM_BASE_ADDR, val)
15 #define bfin_read_DMEM_CONTROL()       bfin_read32(DMEM_CONTROL)
16 #define bfin_write_DMEM_CONTROL(val)   bfin_write32(DMEM_CONTROL, val)
17 #define bfin_read_DCPLB_STATUS()       bfin_read32(DCPLB_STATUS)
18 #define bfin_write_DCPLB_STATUS(val)   bfin_write32(DCPLB_STATUS, val)
19 #define bfin_read_DCPLB_FAULT_ADDR()   bfin_readPTR(DCPLB_FAULT_ADDR)
20 #define bfin_write_DCPLB_FAULT_ADDR(val) bfin_writePTR(DCPLB_FAULT_ADDR, val)
21 #define bfin_read_DCPLB_ADDR0()        bfin_read32(DCPLB_ADDR0)
22 #define bfin_write_DCPLB_ADDR0(val)    bfin_write32(DCPLB_ADDR0, val)
23 #define bfin_read_DCPLB_ADDR1()        bfin_read32(DCPLB_ADDR1)
24 #define bfin_write_DCPLB_ADDR1(val)    bfin_write32(DCPLB_ADDR1, val)
25 #define bfin_read_DCPLB_ADDR2()        bfin_read32(DCPLB_ADDR2)
26 #define bfin_write_DCPLB_ADDR2(val)    bfin_write32(DCPLB_ADDR2, val)
27 #define bfin_read_DCPLB_ADDR3()        bfin_read32(DCPLB_ADDR3)
28 #define bfin_write_DCPLB_ADDR3(val)    bfin_write32(DCPLB_ADDR3, val)
29 #define bfin_read_DCPLB_ADDR4()        bfin_read32(DCPLB_ADDR4)
30 #define bfin_write_DCPLB_ADDR4(val)    bfin_write32(DCPLB_ADDR4, val)
31 #define bfin_read_DCPLB_ADDR5()        bfin_read32(DCPLB_ADDR5)
32 #define bfin_write_DCPLB_ADDR5(val)    bfin_write32(DCPLB_ADDR5, val)
33 #define bfin_read_DCPLB_ADDR6()        bfin_read32(DCPLB_ADDR6)
34 #define bfin_write_DCPLB_ADDR6(val)    bfin_write32(DCPLB_ADDR6, val)
35 #define bfin_read_DCPLB_ADDR7()        bfin_read32(DCPLB_ADDR7)
36 #define bfin_write_DCPLB_ADDR7(val)    bfin_write32(DCPLB_ADDR7, val)
37 #define bfin_read_DCPLB_ADDR8()        bfin_read32(DCPLB_ADDR8)
38 #define bfin_write_DCPLB_ADDR8(val)    bfin_write32(DCPLB_ADDR8, val)
39 #define bfin_read_DCPLB_ADDR9()        bfin_read32(DCPLB_ADDR9)
40 #define bfin_write_DCPLB_ADDR9(val)    bfin_write32(DCPLB_ADDR9, val)
41 #define bfin_read_DCPLB_ADDR10()       bfin_read32(DCPLB_ADDR10)
42 #define bfin_write_DCPLB_ADDR10(val)   bfin_write32(DCPLB_ADDR10, val)
43 #define bfin_read_DCPLB_ADDR11()       bfin_read32(DCPLB_ADDR11)
44 #define bfin_write_DCPLB_ADDR11(val)   bfin_write32(DCPLB_ADDR11, val)
45 #define bfin_read_DCPLB_ADDR12()       bfin_read32(DCPLB_ADDR12)
46 #define bfin_write_DCPLB_ADDR12(val)   bfin_write32(DCPLB_ADDR12, val)
47 #define bfin_read_DCPLB_ADDR13()       bfin_read32(DCPLB_ADDR13)
48 #define bfin_write_DCPLB_ADDR13(val)   bfin_write32(DCPLB_ADDR13, val)
49 #define bfin_read_DCPLB_ADDR14()       bfin_read32(DCPLB_ADDR14)
50 #define bfin_write_DCPLB_ADDR14(val)   bfin_write32(DCPLB_ADDR14, val)
51 #define bfin_read_DCPLB_ADDR15()       bfin_read32(DCPLB_ADDR15)
52 #define bfin_write_DCPLB_ADDR15(val)   bfin_write32(DCPLB_ADDR15, val)
53 #define bfin_read_DCPLB_DATA0()        bfin_read32(DCPLB_DATA0)
54 #define bfin_write_DCPLB_DATA0(val)    bfin_write32(DCPLB_DATA0, val)
55 #define bfin_read_DCPLB_DATA1()        bfin_read32(DCPLB_DATA1)
56 #define bfin_write_DCPLB_DATA1(val)    bfin_write32(DCPLB_DATA1, val)
57 #define bfin_read_DCPLB_DATA2()        bfin_read32(DCPLB_DATA2)
58 #define bfin_write_DCPLB_DATA2(val)    bfin_write32(DCPLB_DATA2, val)
59 #define bfin_read_DCPLB_DATA3()        bfin_read32(DCPLB_DATA3)
60 #define bfin_write_DCPLB_DATA3(val)    bfin_write32(DCPLB_DATA3, val)
61 #define bfin_read_DCPLB_DATA4()        bfin_read32(DCPLB_DATA4)
62 #define bfin_write_DCPLB_DATA4(val)    bfin_write32(DCPLB_DATA4, val)
63 #define bfin_read_DCPLB_DATA5()        bfin_read32(DCPLB_DATA5)
64 #define bfin_write_DCPLB_DATA5(val)    bfin_write32(DCPLB_DATA5, val)
65 #define bfin_read_DCPLB_DATA6()        bfin_read32(DCPLB_DATA6)
66 #define bfin_write_DCPLB_DATA6(val)    bfin_write32(DCPLB_DATA6, val)
67 #define bfin_read_DCPLB_DATA7()        bfin_read32(DCPLB_DATA7)
68 #define bfin_write_DCPLB_DATA7(val)    bfin_write32(DCPLB_DATA7, val)
69 #define bfin_read_DCPLB_DATA8()        bfin_read32(DCPLB_DATA8)
70 #define bfin_write_DCPLB_DATA8(val)    bfin_write32(DCPLB_DATA8, val)
71 #define bfin_read_DCPLB_DATA9()        bfin_read32(DCPLB_DATA9)
72 #define bfin_write_DCPLB_DATA9(val)    bfin_write32(DCPLB_DATA9, val)
73 #define bfin_read_DCPLB_DATA10()       bfin_read32(DCPLB_DATA10)
74 #define bfin_write_DCPLB_DATA10(val)   bfin_write32(DCPLB_DATA10, val)
75 #define bfin_read_DCPLB_DATA11()       bfin_read32(DCPLB_DATA11)
76 #define bfin_write_DCPLB_DATA11(val)   bfin_write32(DCPLB_DATA11, val)
77 #define bfin_read_DCPLB_DATA12()       bfin_read32(DCPLB_DATA12)
78 #define bfin_write_DCPLB_DATA12(val)   bfin_write32(DCPLB_DATA12, val)
79 #define bfin_read_DCPLB_DATA13()       bfin_read32(DCPLB_DATA13)
80 #define bfin_write_DCPLB_DATA13(val)   bfin_write32(DCPLB_DATA13, val)
81 #define bfin_read_DCPLB_DATA14()       bfin_read32(DCPLB_DATA14)
82 #define bfin_write_DCPLB_DATA14(val)   bfin_write32(DCPLB_DATA14, val)
83 #define bfin_read_DCPLB_DATA15()       bfin_read32(DCPLB_DATA15)
84 #define bfin_write_DCPLB_DATA15(val)   bfin_write32(DCPLB_DATA15, val)
85 #define bfin_read_DTEST_COMMAND()      bfin_read32(DTEST_COMMAND)
86 #define bfin_write_DTEST_COMMAND(val)  bfin_write32(DTEST_COMMAND, val)
87 #define bfin_read_DTEST_DATA0()        bfin_read32(DTEST_DATA0)
88 #define bfin_write_DTEST_DATA0(val)    bfin_write32(DTEST_DATA0, val)
89 #define bfin_read_DTEST_DATA1()        bfin_read32(DTEST_DATA1)
90 #define bfin_write_DTEST_DATA1(val)    bfin_write32(DTEST_DATA1, val)
91 #define bfin_read_IMEM_CONTROL()       bfin_read32(IMEM_CONTROL)
92 #define bfin_write_IMEM_CONTROL(val)   bfin_write32(IMEM_CONTROL, val)
93 #define bfin_read_ICPLB_STATUS()       bfin_read32(ICPLB_STATUS)
94 #define bfin_write_ICPLB_STATUS(val)   bfin_write32(ICPLB_STATUS, val)
95 #define bfin_read_ICPLB_FAULT_ADDR()   bfin_read32(ICPLB_FAULT_ADDR)
96 #define bfin_write_ICPLB_FAULT_ADDR(val) bfin_write32(ICPLB_FAULT_ADDR, val)
97 #define bfin_read_ICPLB_ADDR0()        bfin_read32(ICPLB_ADDR0)
98 #define bfin_write_ICPLB_ADDR0(val)    bfin_write32(ICPLB_ADDR0, val)
99 #define bfin_read_ICPLB_ADDR1()        bfin_read32(ICPLB_ADDR1)
100 #define bfin_write_ICPLB_ADDR1(val)    bfin_write32(ICPLB_ADDR1, val)
101 #define bfin_read_ICPLB_ADDR2()        bfin_read32(ICPLB_ADDR2)
102 #define bfin_write_ICPLB_ADDR2(val)    bfin_write32(ICPLB_ADDR2, val)
103 #define bfin_read_ICPLB_ADDR3()        bfin_read32(ICPLB_ADDR3)
104 #define bfin_write_ICPLB_ADDR3(val)    bfin_write32(ICPLB_ADDR3, val)
105 #define bfin_read_ICPLB_ADDR4()        bfin_read32(ICPLB_ADDR4)
106 #define bfin_write_ICPLB_ADDR4(val)    bfin_write32(ICPLB_ADDR4, val)
107 #define bfin_read_ICPLB_ADDR5()        bfin_read32(ICPLB_ADDR5)
108 #define bfin_write_ICPLB_ADDR5(val)    bfin_write32(ICPLB_ADDR5, val)
109 #define bfin_read_ICPLB_ADDR6()        bfin_read32(ICPLB_ADDR6)
110 #define bfin_write_ICPLB_ADDR6(val)    bfin_write32(ICPLB_ADDR6, val)
111 #define bfin_read_ICPLB_ADDR7()        bfin_read32(ICPLB_ADDR7)
112 #define bfin_write_ICPLB_ADDR7(val)    bfin_write32(ICPLB_ADDR7, val)
113 #define bfin_read_ICPLB_ADDR8()        bfin_read32(ICPLB_ADDR8)
114 #define bfin_write_ICPLB_ADDR8(val)    bfin_write32(ICPLB_ADDR8, val)
115 #define bfin_read_ICPLB_ADDR9()        bfin_read32(ICPLB_ADDR9)
116 #define bfin_write_ICPLB_ADDR9(val)    bfin_write32(ICPLB_ADDR9, val)
117 #define bfin_read_ICPLB_ADDR10()       bfin_read32(ICPLB_ADDR10)
118 #define bfin_write_ICPLB_ADDR10(val)   bfin_write32(ICPLB_ADDR10, val)
119 #define bfin_read_ICPLB_ADDR11()       bfin_read32(ICPLB_ADDR11)
120 #define bfin_write_ICPLB_ADDR11(val)   bfin_write32(ICPLB_ADDR11, val)
121 #define bfin_read_ICPLB_ADDR12()       bfin_read32(ICPLB_ADDR12)
122 #define bfin_write_ICPLB_ADDR12(val)   bfin_write32(ICPLB_ADDR12, val)
123 #define bfin_read_ICPLB_ADDR13()       bfin_read32(ICPLB_ADDR13)
124 #define bfin_write_ICPLB_ADDR13(val)   bfin_write32(ICPLB_ADDR13, val)
125 #define bfin_read_ICPLB_ADDR14()       bfin_read32(ICPLB_ADDR14)
126 #define bfin_write_ICPLB_ADDR14(val)   bfin_write32(ICPLB_ADDR14, val)
127 #define bfin_read_ICPLB_ADDR15()       bfin_read32(ICPLB_ADDR15)
128 #define bfin_write_ICPLB_ADDR15(val)   bfin_write32(ICPLB_ADDR15, val)
129 #define bfin_read_ICPLB_DATA0()        bfin_read32(ICPLB_DATA0)
130 #define bfin_write_ICPLB_DATA0(val)    bfin_write32(ICPLB_DATA0, val)
131 #define bfin_read_ICPLB_DATA1()        bfin_read32(ICPLB_DATA1)
132 #define bfin_write_ICPLB_DATA1(val)    bfin_write32(ICPLB_DATA1, val)
133 #define bfin_read_ICPLB_DATA2()        bfin_read32(ICPLB_DATA2)
134 #define bfin_write_ICPLB_DATA2(val)    bfin_write32(ICPLB_DATA2, val)
135 #define bfin_read_ICPLB_DATA3()        bfin_read32(ICPLB_DATA3)
136 #define bfin_write_ICPLB_DATA3(val)    bfin_write32(ICPLB_DATA3, val)
137 #define bfin_read_ICPLB_DATA4()        bfin_read32(ICPLB_DATA4)
138 #define bfin_write_ICPLB_DATA4(val)    bfin_write32(ICPLB_DATA4, val)
139 #define bfin_read_ICPLB_DATA5()        bfin_read32(ICPLB_DATA5)
140 #define bfin_write_ICPLB_DATA5(val)    bfin_write32(ICPLB_DATA5, val)
141 #define bfin_read_ICPLB_DATA6()        bfin_read32(ICPLB_DATA6)
142 #define bfin_write_ICPLB_DATA6(val)    bfin_write32(ICPLB_DATA6, val)
143 #define bfin_read_ICPLB_DATA7()        bfin_read32(ICPLB_DATA7)
144 #define bfin_write_ICPLB_DATA7(val)    bfin_write32(ICPLB_DATA7, val)
145 #define bfin_read_ICPLB_DATA8()        bfin_read32(ICPLB_DATA8)
146 #define bfin_write_ICPLB_DATA8(val)    bfin_write32(ICPLB_DATA8, val)
147 #define bfin_read_ICPLB_DATA9()        bfin_read32(ICPLB_DATA9)
148 #define bfin_write_ICPLB_DATA9(val)    bfin_write32(ICPLB_DATA9, val)
149 #define bfin_read_ICPLB_DATA10()       bfin_read32(ICPLB_DATA10)
150 #define bfin_write_ICPLB_DATA10(val)   bfin_write32(ICPLB_DATA10, val)
151 #define bfin_read_ICPLB_DATA11()       bfin_read32(ICPLB_DATA11)
152 #define bfin_write_ICPLB_DATA11(val)   bfin_write32(ICPLB_DATA11, val)
153 #define bfin_read_ICPLB_DATA12()       bfin_read32(ICPLB_DATA12)
154 #define bfin_write_ICPLB_DATA12(val)   bfin_write32(ICPLB_DATA12, val)
155 #define bfin_read_ICPLB_DATA13()       bfin_read32(ICPLB_DATA13)
156 #define bfin_write_ICPLB_DATA13(val)   bfin_write32(ICPLB_DATA13, val)
157 #define bfin_read_ICPLB_DATA14()       bfin_read32(ICPLB_DATA14)
158 #define bfin_write_ICPLB_DATA14(val)   bfin_write32(ICPLB_DATA14, val)
159 #define bfin_read_ICPLB_DATA15()       bfin_read32(ICPLB_DATA15)
160 #define bfin_write_ICPLB_DATA15(val)   bfin_write32(ICPLB_DATA15, val)
161 #define bfin_read_ITEST_COMMAND()      bfin_read32(ITEST_COMMAND)
162 #define bfin_write_ITEST_COMMAND(val)  bfin_write32(ITEST_COMMAND, val)
163 #define bfin_read_ITEST_DATA0()        bfin_read32(ITEST_DATA0)
164 #define bfin_write_ITEST_DATA0(val)    bfin_write32(ITEST_DATA0, val)
165 #define bfin_read_ITEST_DATA1()        bfin_read32(ITEST_DATA1)
166 #define bfin_write_ITEST_DATA1(val)    bfin_write32(ITEST_DATA1, val)
167 #define bfin_read_SICA_SWRST()         bfin_read16(SICA_SWRST)
168 #define bfin_write_SICA_SWRST(val)     bfin_write16(SICA_SWRST, val)
169 #define bfin_read_SICA_SYSCR()         bfin_read16(SICA_SYSCR)
170 #define bfin_write_SICA_SYSCR(val)     bfin_write16(SICA_SYSCR, val)
171 #define bfin_read_SICA_RVECT()         bfin_read16(SICA_RVECT)
172 #define bfin_write_SICA_RVECT(val)     bfin_write16(SICA_RVECT, val)
173 #define bfin_read_SICA_IMASK0()        bfin_read32(SICA_IMASK0)
174 #define bfin_write_SICA_IMASK0(val)    bfin_write32(SICA_IMASK0, val)
175 #define bfin_read_SICA_IMASK1()        bfin_read32(SICA_IMASK1)
176 #define bfin_write_SICA_IMASK1(val)    bfin_write32(SICA_IMASK1, val)
177 #define bfin_read_SICA_ISR0()          bfin_read32(SICA_ISR0)
178 #define bfin_write_SICA_ISR0(val)      bfin_write32(SICA_ISR0, val)
179 #define bfin_read_SICA_ISR1()          bfin_read32(SICA_ISR1)
180 #define bfin_write_SICA_ISR1(val)      bfin_write32(SICA_ISR1, val)
181 #define bfin_read_SICA_IWR0()          bfin_read32(SICA_IWR0)
182 #define bfin_write_SICA_IWR0(val)      bfin_write32(SICA_IWR0, val)
183 #define bfin_read_SICA_IWR1()          bfin_read32(SICA_IWR1)
184 #define bfin_write_SICA_IWR1(val)      bfin_write32(SICA_IWR1, val)
185 #define bfin_read_SICA_IAR0()          bfin_read32(SICA_IAR0)
186 #define bfin_write_SICA_IAR0(val)      bfin_write32(SICA_IAR0, val)
187 #define bfin_read_SICA_IAR1()          bfin_read32(SICA_IAR1)
188 #define bfin_write_SICA_IAR1(val)      bfin_write32(SICA_IAR1, val)
189 #define bfin_read_SICA_IAR2()          bfin_read32(SICA_IAR2)
190 #define bfin_write_SICA_IAR2(val)      bfin_write32(SICA_IAR2, val)
191 #define bfin_read_SICA_IAR3()          bfin_read32(SICA_IAR3)
192 #define bfin_write_SICA_IAR3(val)      bfin_write32(SICA_IAR3, val)
193 #define bfin_read_SICA_IAR4()          bfin_read32(SICA_IAR4)
194 #define bfin_write_SICA_IAR4(val)      bfin_write32(SICA_IAR4, val)
195 #define bfin_read_SICA_IAR5()          bfin_read32(SICA_IAR5)
196 #define bfin_write_SICA_IAR5(val)      bfin_write32(SICA_IAR5, val)
197 #define bfin_read_SICA_IAR6()          bfin_read32(SICA_IAR6)
198 #define bfin_write_SICA_IAR6(val)      bfin_write32(SICA_IAR6, val)
199 #define bfin_read_SICA_IAR7()          bfin_read32(SICA_IAR7)
200 #define bfin_write_SICA_IAR7(val)      bfin_write32(SICA_IAR7, val)
201 #define bfin_read_SICB_SWRST()         bfin_read16(SICB_SWRST)
202 #define bfin_write_SICB_SWRST(val)     bfin_write16(SICB_SWRST, val)
203 #define bfin_read_SICB_SYSCR()         bfin_read16(SICB_SYSCR)
204 #define bfin_write_SICB_SYSCR(val)     bfin_write16(SICB_SYSCR, val)
205 #define bfin_read_SICB_RVECT()         bfin_read16(SICB_RVECT)
206 #define bfin_write_SICB_RVECT(val)     bfin_write16(SICB_RVECT, val)
207 #define bfin_read_SICB_IMASK0()        bfin_read32(SICB_IMASK0)
208 #define bfin_write_SICB_IMASK0(val)    bfin_write32(SICB_IMASK0, val)
209 #define bfin_read_SICB_IMASK1()        bfin_read32(SICB_IMASK1)
210 #define bfin_write_SICB_IMASK1(val)    bfin_write32(SICB_IMASK1, val)
211 #define bfin_read_SICB_ISR0()          bfin_read32(SICB_ISR0)
212 #define bfin_write_SICB_ISR0(val)      bfin_write32(SICB_ISR0, val)
213 #define bfin_read_SICB_ISR1()          bfin_read32(SICB_ISR1)
214 #define bfin_write_SICB_ISR1(val)      bfin_write32(SICB_ISR1, val)
215 #define bfin_read_SICB_IWR0()          bfin_read32(SICB_IWR0)
216 #define bfin_write_SICB_IWR0(val)      bfin_write32(SICB_IWR0, val)
217 #define bfin_read_SICB_IWR1()          bfin_read32(SICB_IWR1)
218 #define bfin_write_SICB_IWR1(val)      bfin_write32(SICB_IWR1, val)
219 #define bfin_read_SICB_IAR0()          bfin_read32(SICB_IAR0)
220 #define bfin_write_SICB_IAR0(val)      bfin_write32(SICB_IAR0, val)
221 #define bfin_read_SICB_IAR1()          bfin_read32(SICB_IAR1)
222 #define bfin_write_SICB_IAR1(val)      bfin_write32(SICB_IAR1, val)
223 #define bfin_read_SICB_IAR2()          bfin_read32(SICB_IAR2)
224 #define bfin_write_SICB_IAR2(val)      bfin_write32(SICB_IAR2, val)
225 #define bfin_read_SICB_IAR3()          bfin_read32(SICB_IAR3)
226 #define bfin_write_SICB_IAR3(val)      bfin_write32(SICB_IAR3, val)
227 #define bfin_read_SICB_IAR4()          bfin_read32(SICB_IAR4)
228 #define bfin_write_SICB_IAR4(val)      bfin_write32(SICB_IAR4, val)
229 #define bfin_read_SICB_IAR5()          bfin_read32(SICB_IAR5)
230 #define bfin_write_SICB_IAR5(val)      bfin_write32(SICB_IAR5, val)
231 #define bfin_read_SICB_IAR6()          bfin_read32(SICB_IAR6)
232 #define bfin_write_SICB_IAR6(val)      bfin_write32(SICB_IAR6, val)
233 #define bfin_read_SICB_IAR7()          bfin_read32(SICB_IAR7)
234 #define bfin_write_SICB_IAR7(val)      bfin_write32(SICB_IAR7, val)
235 #define bfin_read_PPI0_CONTROL()       bfin_read16(PPI0_CONTROL)
236 #define bfin_write_PPI0_CONTROL(val)   bfin_write16(PPI0_CONTROL, val)
237 #define bfin_read_PPI0_STATUS()        bfin_read16(PPI0_STATUS)
238 #define bfin_write_PPI0_STATUS(val)    bfin_write16(PPI0_STATUS, val)
239 #define bfin_read_PPI0_DELAY()         bfin_read16(PPI0_DELAY)
240 #define bfin_write_PPI0_DELAY(val)     bfin_write16(PPI0_DELAY, val)
241 #define bfin_read_PPI0_COUNT()         bfin_read16(PPI0_COUNT)
242 #define bfin_write_PPI0_COUNT(val)     bfin_write16(PPI0_COUNT, val)
243 #define bfin_read_PPI0_FRAME()         bfin_read16(PPI0_FRAME)
244 #define bfin_write_PPI0_FRAME(val)     bfin_write16(PPI0_FRAME, val)
245 #define bfin_read_PPI1_CONTROL()       bfin_read16(PPI1_CONTROL)
246 #define bfin_write_PPI1_CONTROL(val)   bfin_write16(PPI1_CONTROL, val)
247 #define bfin_read_PPI1_STATUS()        bfin_read16(PPI1_STATUS)
248 #define bfin_write_PPI1_STATUS(val)    bfin_write16(PPI1_STATUS, val)
249 #define bfin_read_PPI1_DELAY()         bfin_read16(PPI1_DELAY)
250 #define bfin_write_PPI1_DELAY(val)     bfin_write16(PPI1_DELAY, val)
251 #define bfin_read_PPI1_COUNT()         bfin_read16(PPI1_COUNT)
252 #define bfin_write_PPI1_COUNT(val)     bfin_write16(PPI1_COUNT, val)
253 #define bfin_read_PPI1_FRAME()         bfin_read16(PPI1_FRAME)
254 #define bfin_write_PPI1_FRAME(val)     bfin_write16(PPI1_FRAME, val)
255 #define bfin_read_TBUFCTL()            bfin_read32(TBUFCTL)
256 #define bfin_write_TBUFCTL(val)        bfin_write32(TBUFCTL, val)
257 #define bfin_read_TBUFSTAT()           bfin_read32(TBUFSTAT)
258 #define bfin_write_TBUFSTAT(val)       bfin_write32(TBUFSTAT, val)
259 #define bfin_read_TBUF()               bfin_read32(TBUF)
260 #define bfin_write_TBUF(val)           bfin_write32(TBUF, val)
261 #define bfin_read_PFCTL()              bfin_read32(PFCTL)
262 #define bfin_write_PFCTL(val)          bfin_write32(PFCTL, val)
263 #define bfin_read_PFCNTR0()            bfin_read32(PFCNTR0)
264 #define bfin_write_PFCNTR0(val)        bfin_write32(PFCNTR0, val)
265 #define bfin_read_PFCNTR1()            bfin_read32(PFCNTR1)
266 #define bfin_write_PFCNTR1(val)        bfin_write32(PFCNTR1, val)
267 #define bfin_read_SRAM_BASE_ADDR_CORE_A() bfin_read32(SRAM_BASE_ADDR_CORE_A)
268 #define bfin_write_SRAM_BASE_ADDR_CORE_A(val) bfin_write32(SRAM_BASE_ADDR_CORE_A, val)
269 #define bfin_read_SRAM_BASE_ADDR_CORE_B() bfin_read32(SRAM_BASE_ADDR_CORE_B)
270 #define bfin_write_SRAM_BASE_ADDR_CORE_B(val) bfin_write32(SRAM_BASE_ADDR_CORE_B, val)
271 #define bfin_read_EVT_OVERRIDE()       bfin_read32(EVT_OVERRIDE)
272 #define bfin_write_EVT_OVERRIDE(val)   bfin_write32(EVT_OVERRIDE, val)
273 #define bfin_read_UART_THR()           bfin_read16(UART_THR)
274 #define bfin_write_UART_THR(val)       bfin_write16(UART_THR, val)
275 #define bfin_read_UART_RBR()           bfin_read16(UART_RBR)
276 #define bfin_write_UART_RBR(val)       bfin_write16(UART_RBR, val)
277 #define bfin_read_UART_DLL()           bfin_read16(UART_DLL)
278 #define bfin_write_UART_DLL(val)       bfin_write16(UART_DLL, val)
279 #define bfin_read_UART_DLH()           bfin_read16(UART_DLH)
280 #define bfin_write_UART_DLH(val)       bfin_write16(UART_DLH, val)
281 #define bfin_read_UART_IER()           bfin_read16(UART_IER)
282 #define bfin_write_UART_IER(val)       bfin_write16(UART_IER, val)
283 #define bfin_read_UART_IIR()           bfin_read16(UART_IIR)
284 #define bfin_write_UART_IIR(val)       bfin_write16(UART_IIR, val)
285 #define bfin_read_UART_LCR()           bfin_read16(UART_LCR)
286 #define bfin_write_UART_LCR(val)       bfin_write16(UART_LCR, val)
287 #define bfin_read_UART_MCR()           bfin_read16(UART_MCR)
288 #define bfin_write_UART_MCR(val)       bfin_write16(UART_MCR, val)
289 #define bfin_read_UART_LSR()           bfin_read16(UART_LSR)
290 #define bfin_write_UART_LSR(val)       bfin_write16(UART_LSR, val)
291 #define bfin_read_UART_MSR()           bfin_read16(UART_MSR)
292 #define bfin_write_UART_MSR(val)       bfin_write16(UART_MSR, val)
293 #define bfin_read_UART_SCR()           bfin_read16(UART_SCR)
294 #define bfin_write_UART_SCR(val)       bfin_write16(UART_SCR, val)
295 #define bfin_read_UART_GCTL()          bfin_read16(UART_GCTL)
296 #define bfin_write_UART_GCTL(val)      bfin_write16(UART_GCTL, val)
297 #define bfin_read_UART_GBL()           bfin_read16(UART_GBL)
298 #define bfin_write_UART_GBL(val)       bfin_write16(UART_GBL, val)
299 #define bfin_read_EBIU_AMGCTL()        bfin_read16(EBIU_AMGCTL)
300 #define bfin_write_EBIU_AMGCTL(val)    bfin_write16(EBIU_AMGCTL, val)
301 #define bfin_read_EBIU_AMBCTL0()       bfin_read32(EBIU_AMBCTL0)
302 #define bfin_write_EBIU_AMBCTL0(val)   bfin_write32(EBIU_AMBCTL0, val)
303 #define bfin_read_EBIU_AMBCTL1()       bfin_read32(EBIU_AMBCTL1)
304 #define bfin_write_EBIU_AMBCTL1(val)   bfin_write32(EBIU_AMBCTL1, val)
305 #define bfin_read_EBIU_SDGCTL()        bfin_read32(EBIU_SDGCTL)
306 #define bfin_write_EBIU_SDGCTL(val)    bfin_write32(EBIU_SDGCTL, val)
307 #define bfin_read_EBIU_SDBCTL()        bfin_read32(EBIU_SDBCTL)
308 #define bfin_write_EBIU_SDBCTL(val)    bfin_write32(EBIU_SDBCTL, val)
309 #define bfin_read_EBIU_SDRRC()         bfin_read16(EBIU_SDRRC)
310 #define bfin_write_EBIU_SDRRC(val)     bfin_write16(EBIU_SDRRC, val)
311 #define bfin_read_EBIU_SDSTAT()        bfin_read16(EBIU_SDSTAT)
312 #define bfin_write_EBIU_SDSTAT(val)    bfin_write16(EBIU_SDSTAT, val)
313
314 #endif /* __BFIN_CDEF_ADSP_BF561_proc__ */