2 * clocks.c - figure out sclk/cclk/vco and such
4 * Copyright (c) 2005-2008 Analog Devices Inc.
6 * Licensed under the GPL-2 or later.
10 #include <asm/blackfin.h>
13 # include <asm/mach-common/bits/pll.h>
14 # define pll_is_bypassed() (bfin_read_PLL_STAT() & DF)
16 # include <asm/mach-common/bits/cgu.h>
17 # define pll_is_bypassed() (bfin_read_CGU_STAT() & PLLBP)
18 # define bfin_read_PLL_CTL() bfin_read_CGU_CTL()
19 # define bfin_read_PLL_DIV() bfin_read_CGU_DIV()
22 /* Get the voltage input multiplier */
25 static u_long cached_vco_pll_ctl, cached_vco;
29 pll_ctl = bfin_read_PLL_CTL();
30 if (pll_ctl == cached_vco_pll_ctl)
33 cached_vco_pll_ctl = pll_ctl;
35 msel = (pll_ctl & MSEL) >> MSEL_P;
37 msel = (MSEL >> MSEL_P) + 1;
39 cached_vco = CONFIG_CLKIN_HZ;
40 cached_vco >>= (pll_ctl & DF);
45 /* Get the Core clock */
48 static u_long cached_cclk_pll_div, cached_cclk;
49 u_long div, csel, ssel;
51 if (pll_is_bypassed())
52 return CONFIG_CLKIN_HZ;
54 div = bfin_read_PLL_DIV();
55 if (div == cached_cclk_pll_div)
58 cached_cclk_pll_div = div;
60 csel = (div & CSEL) >> CSEL_P;
62 ssel = (div & SSEL) >> SSEL_P;
63 if (ssel && ssel < (1 << csel)) /* SCLK > CCLK */
64 cached_cclk = get_vco() / ssel;
66 cached_cclk = get_vco() >> csel;
68 cached_cclk = get_vco() / csel;
73 /* Get the System clock */
76 static u_long cached_sclk_pll_div, cached_sclk;
77 static u_long cached_sclk0, cached_sclk1, cached_dclk;
78 static u_long _get_sclk(u_long *cache)
82 if (pll_is_bypassed())
83 return CONFIG_CLKIN_HZ;
85 div = bfin_read_PLL_DIV();
86 if (div == cached_sclk_pll_div)
89 cached_sclk_pll_div = div;
91 ssel = (div & SYSSEL) >> SYSSEL_P;
92 cached_sclk = get_vco() / ssel;
94 ssel = (div & S0SEL) >> S0SEL_P;
95 cached_sclk0 = cached_sclk / ssel;
97 ssel = (div & S1SEL) >> S1SEL_P;
98 cached_sclk1 = cached_sclk / ssel;
100 ssel = (div & DSEL) >> DSEL_P;
101 cached_dclk = get_vco() / ssel;
106 u_long get_sclk(void)
108 return _get_sclk(&cached_sclk);
111 u_long get_sclk0(void)
113 return _get_sclk(&cached_sclk0);
116 u_long get_sclk1(void)
118 return _get_sclk(&cached_sclk1);
121 u_long get_dclk(void)
123 return _get_sclk(&cached_dclk);
127 u_long get_sclk(void)
129 static u_long cached_sclk_pll_div, cached_sclk;
132 if (pll_is_bypassed())
133 return CONFIG_CLKIN_HZ;
135 div = bfin_read_PLL_DIV();
136 if (div == cached_sclk_pll_div)
139 cached_sclk_pll_div = div;
141 ssel = (div & SSEL) >> SSEL_P;
142 cached_sclk = get_vco() / ssel;