1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
5 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
8 /* CPU specific interrupt routine */
10 #include <asm/immap.h>
13 int interrupt_init(void)
15 int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
17 /* Make sure all interrupts are disabled */
18 setbits_be32(&intp->imrl0, 0x1);
24 #if defined(CONFIG_MCFTMR)
25 void dtimer_intr_setup(void)
27 int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
29 out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI);
30 clrbits_be32(&intp->imrl0, INTC_IPRL_INT0);
31 clrbits_be32(&intp->imrl0, CONFIG_SYS_TMRINTR_MASK);