3 * Josef Baumgartner <josef.baumgartner@telex.de>
5 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
6 * Hayden Fraser (Hayden.Fraser@freescale.com)
8 * SPDX-License-Identifier: GPL-2.0+
12 #include <asm/processor.h>
13 #include <asm/immap.h>
16 DECLARE_GLOBAL_DATA_PTR;
18 /* get_clocks() fills in gd->cpu_clock and gd->bus_clk */
21 #if defined(CONFIG_M5208)
22 pll_t *pll = (pll_t *) MMAP_PLL;
24 out_8(&pll->odr, CONFIG_SYS_PLL_ODR);
25 out_8(&pll->fdr, CONFIG_SYS_PLL_FDR);
28 #if defined(CONFIG_M5249) || defined(CONFIG_M5253)
29 volatile unsigned long cpll = mbar2_readLong(MCFSIM_PLLCR);
32 #ifndef CONFIG_SYS_PLL_BYPASS
35 /* Setup the PLL to run at the specified speed */
36 #ifdef CONFIG_SYS_FAST_CLK
37 pllcr = 0x925a3100; /* ~140MHz clock (PLL bypass = 0) */
39 pllcr = 0x135a4140; /* ~72MHz clock (PLL bypass = 0) */
41 #endif /* CONFIG_M5249 */
44 pllcr = CONFIG_SYS_PLLCR;
45 #endif /* CONFIG_M5253 */
47 cpll = cpll & 0xfffffffe; /* Set PLL bypass mode = 0 (PSTCLK = crystal) */
48 mbar2_writeLong(MCFSIM_PLLCR, cpll); /* Set the PLL to bypass mode (PSTCLK = crystal) */
49 mbar2_writeLong(MCFSIM_PLLCR, pllcr); /* set the clock speed */
50 pllcr ^= 0x00000001; /* Set pll bypass to 1 */
51 mbar2_writeLong(MCFSIM_PLLCR, pllcr); /* Start locking (pll bypass = 1) */
52 udelay(0x20); /* Wait for a lock ... */
53 #endif /* #ifndef CONFIG_SYS_PLL_BYPASS */
55 #endif /* CONFIG_M5249 || CONFIG_M5253 */
57 #if defined(CONFIG_M5275)
58 pll_t *pll = (pll_t *)(MMAP_PLL);
61 out_be32(&pll->syncr, 0x01080000);
62 while (!(in_be32(&pll->synsr) & FMPLL_SYNSR_LOCK))
64 out_be32(&pll->syncr, 0x01000000);
65 while (!(in_be32(&pll->synsr) & FMPLL_SYNSR_LOCK))
69 gd->cpu_clk = CONFIG_SYS_CLK;
70 #if defined(CONFIG_M5208) || defined(CONFIG_M5249) || defined(CONFIG_M5253) || \
71 defined(CONFIG_M5271) || defined(CONFIG_M5275)
72 gd->bus_clk = gd->cpu_clk / 2;
74 gd->bus_clk = gd->cpu_clk;
77 #ifdef CONFIG_SYS_I2C_FSL
78 gd->arch.i2c1_clk = gd->bus_clk;
79 #ifdef CONFIG_SYS_I2C2_FSL_OFFSET
80 gd->arch.i2c2_clk = gd->bus_clk;