2 * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
3 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 #include <asm-offsets.h>
26 #include <timestamp.h>
28 #include <asm/cache.h>
30 #ifndef CONFIG_IDENT_STRING
31 #define CONFIG_IDENT_STRING ""
38 move.w #0x2700,%sr; /* disable intrs */ \
39 subl #60,%sp; /* space for 15 regs */ \
40 moveml %d0-%d7/%a0-%a6,%sp@;
43 moveml %sp@,%d0-%d7/%a0-%a6; \
44 addl #60,%sp; /* space for 15 regs */ \
47 #if defined(CONFIG_CF_SBF)
48 #define ASM_DRAMINIT (asm_dram_init - CONFIG_SYS_TEXT_BASE + CONFIG_SYS_INIT_RAM_ADDR)
49 #define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - CONFIG_SYS_TEXT_BASE + CONFIG_SYS_INIT_RAM_ADDR)
55 * Vector table. This is used for initial platform startup.
56 * These vectors are to catch any un-intended traps.
59 #if defined(CONFIG_CF_SBF)
61 INITSP: .long 0 /* Initial SP */
62 INITPC: .long ASM_DRAMINIT /* Initial PC */
66 INITSP: .long 0 /* Initial SP */
67 INITPC: .long _START /* Initial PC */
71 vector02: .long _FAULT /* Access Error */
72 vector03: .long _FAULT /* Address Error */
73 vector04: .long _FAULT /* Illegal Instruction */
74 vector05: .long _FAULT /* Reserved */
75 vector06: .long _FAULT /* Reserved */
76 vector07: .long _FAULT /* Reserved */
77 vector08: .long _FAULT /* Privilege Violation */
78 vector09: .long _FAULT /* Trace */
79 vector0A: .long _FAULT /* Unimplemented A-Line */
80 vector0B: .long _FAULT /* Unimplemented F-Line */
81 vector0C: .long _FAULT /* Debug Interrupt */
82 vector0D: .long _FAULT /* Reserved */
83 vector0E: .long _FAULT /* Format Error */
84 vector0F: .long _FAULT /* Unitialized Int. */
88 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
90 vector18: .long _FAULT /* Spurious Interrupt */
91 vector19: .long _FAULT /* Autovector Level 1 */
92 vector1A: .long _FAULT /* Autovector Level 2 */
93 vector1B: .long _FAULT /* Autovector Level 3 */
94 vector1C: .long _FAULT /* Autovector Level 4 */
95 vector1D: .long _FAULT /* Autovector Level 5 */
96 vector1E: .long _FAULT /* Autovector Level 6 */
97 vector1F: .long _FAULT /* Autovector Level 7 */
99 #if !defined(CONFIG_CF_SBF)
103 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
104 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
108 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
109 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
112 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
113 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
114 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
115 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
116 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
117 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
118 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
119 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
122 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
123 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
124 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
125 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
126 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
127 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
128 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
129 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
132 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
133 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
134 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
135 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
136 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
137 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
138 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
139 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
142 #if defined(CONFIG_CF_SBF)
143 /* Image header: chksum 4 bytes, len 4 bytes, img dest 4 bytes */
145 .long 0x00000000 /* checksum, not yet implemented */
146 .long 0x00030000 /* image length */
147 .long CONFIG_SYS_TEXT_BASE /* image to be relocated at */
150 move.w #0x2700,%sr /* Mask off Interrupt */
152 move.l #CONFIG_SYS_INIT_RAM_ADDR, %d0
155 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
158 /* initialize general use internal ram */
160 move.l #(ICACHE_STATUS), %a1 /* icache */
161 move.l #(DCACHE_STATUS), %a2 /* dcache */
165 /* invalidate and disable cache */
166 move.l #(CONFIG_SYS_ICACHE_INV + CONFIG_SYS_DCACHE_INV), %d0
167 movec %d0, %CACR /* Invalidate cache */
174 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
177 /* Must disable global address */
178 move.l #0xFC008000, %a1
179 move.l #(CONFIG_SYS_CS0_BASE), (%a1)
180 move.l #0xFC008008, %a1
181 move.l #(CONFIG_SYS_CS0_CTRL), (%a1)
182 move.l #0xFC008004, %a1
183 move.l #(CONFIG_SYS_CS0_MASK), (%a1)
185 /* Dram Initialization a1, a2, and d0 */
187 move.l #0xFC0A4074, %a1
188 move.b #(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1)
191 /* SDRAM Chip 0 and 1 */
192 move.l #0xFC0B8110, %a1
193 move.l #0xFC0B8114, %a2
195 /* calculate the size */
197 move.l #(CONFIG_SYS_SDRAM_SIZE), %d2
198 #ifdef CONFIG_SYS_SDRAM_BASE1
208 /* SDRAM Chip 0 and 1 */
209 move.l #(CONFIG_SYS_SDRAM_BASE), (%a1)
211 #ifdef CONFIG_SYS_SDRAM_BASE1
212 move.l #(CONFIG_SYS_SDRAM_BASE1), (%a2)
217 /* dram cfg1 and cfg2 */
218 move.l #0xFC0B8008, %a1
219 move.l #(CONFIG_SYS_SDRAM_CFG1), (%a1)
221 move.l #0xFC0B800C, %a2
222 move.l #(CONFIG_SYS_SDRAM_CFG2), (%a2)
225 move.l #0xFC0B8000, %a1 /* Mode */
226 move.l #0xFC0B8004, %a2 /* Ctrl */
229 move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
232 #ifdef CONFIG_M54455EVB
234 move.l #(CONFIG_SYS_SDRAM_EMOD + 0x408), (%a1)
236 move.l #(CONFIG_SYS_SDRAM_MODE + 0x300), (%a1)
244 move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
247 /* Perform two refresh cycles */
248 move.l #(CONFIG_SYS_SDRAM_CTRL + 4), %d0
254 #ifdef CONFIG_M54455EVB
255 move.l #(CONFIG_SYS_SDRAM_MODE + 0x200), (%a1)
257 #elif defined(CONFIG_M54451EVB)
259 move.l #(CONFIG_SYS_SDRAM_MODE), (%a1)
261 move.l #(CONFIG_SYS_SDRAM_EMOD), (%a1)
267 move.l #(CONFIG_SYS_SDRAM_CTRL), %d1
268 and.l #0x7FFFFFFF, %d1
269 #ifdef CONFIG_M54455EVB
270 or.l #0x10000C00, %d1
271 #elif defined(CONFIG_M54451EVB)
272 or.l #0x10000C00, %d1
281 * DSPI Initialization
282 * a0 - general, sram - 0x80008000 - 32, see M54455EVB.h
288 /* Enable pins for DSPI mode - chip-selects are enabled later */
290 move.l #0xFC0A4063, %a0
293 /* Configure DSPI module */
294 move.l #0xFC05C000, %a0
295 move.l #0x80FF0C00, (%a0) /* Master, clear TX/RX FIFO */
297 move.l #0xFC05C00C, %a0
298 move.l #0x3E000011, (%a0)
300 move.l #0xFC05C034, %a2 /* dtfr */
301 move.l #0xFC05C03B, %a3 /* drfr */
303 move.l #(ASM_SBF_IMG_HDR + 4), %a1
307 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_SBFHDR_DATA_OFFSET), %a0
308 move.l #(CONFIG_SYS_SBFHDR_SIZE), %d4
310 move.l #0xFC05C02C, %a1 /* dspi status */
312 /* Issue commands and address */
313 move.l #0x8002000B, %d2 /* Fast Read Cmd */
314 jsr asm_dspi_wr_status
315 jsr asm_dspi_rd_status
317 move.l #0x80020000, %d2 /* Address byte 2 */
318 jsr asm_dspi_wr_status
319 jsr asm_dspi_rd_status
321 move.l #0x80020000, %d2 /* Address byte 1 */
322 jsr asm_dspi_wr_status
323 jsr asm_dspi_rd_status
325 move.l #0x80020000, %d2 /* Address byte 0 */
326 jsr asm_dspi_wr_status
327 jsr asm_dspi_rd_status
329 move.l #0x80020000, %d2 /* Dummy Wr and Rd */
330 jsr asm_dspi_wr_status
331 jsr asm_dspi_rd_status
333 /* Transfer serial boot header to sram */
335 move.l #0x80020000, %d2
336 jsr asm_dspi_wr_status
337 jsr asm_dspi_rd_status
339 move.b %d1, (%a0) /* read, copy to dst */
341 add.l #1, %a0 /* inc dst by 1 */
342 sub.l #1, %d4 /* dec cnt by 1 */
343 bne asm_dspi_rd_loop1
345 /* Transfer u-boot from serial flash to memory */
347 move.l #0x80020000, %d2
348 jsr asm_dspi_wr_status
349 jsr asm_dspi_rd_status
351 move.b %d1, (%a4) /* read, copy to dst */
353 add.l #1, %a4 /* inc dst by 1 */
354 sub.l #1, %d5 /* dec cnt by 1 */
355 bne asm_dspi_rd_loop2
357 move.l #0x00020000, %d2 /* Terminate */
358 jsr asm_dspi_wr_status
359 jsr asm_dspi_rd_status
361 /* jump to memory and execute */
362 move.l #(CONFIG_SYS_TEXT_BASE + 0x400), %a0
366 move.l (%a1), %d0 /* status */
367 and.l #0x0000F000, %d0
368 cmp.l #0x00003000, %d0
369 bgt asm_dspi_wr_status
375 move.l (%a1), %d0 /* status */
376 and.l #0x000000F0, %d0
379 beq asm_dspi_rd_status
389 #endif /* CONFIG_CF_SBF */
395 #if !defined(CONFIG_CF_SBF)
398 move.w #0x2700,%sr /* Mask off Interrupt */
400 /* Set vector base register at the beginning of the Flash */
401 move.l #CONFIG_SYS_FLASH_BASE, %d0
404 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
407 /* initialize general use internal ram */
409 move.l #(ICACHE_STATUS), %a1 /* icache */
410 move.l #(DCACHE_STATUS), %a2 /* dcache */
414 /* invalidate and disable cache */
415 move.l #(CONFIG_SYS_ICACHE_INV + CONFIG_SYS_DCACHE_INV), %d0
416 movec %d0, %CACR /* Invalidate cache */
423 /* set stackpointer to end of internal ram to get some stackspace for
425 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
429 move.l #__got_start, %a5 /* put relocation table address to a5 */
431 bsr cpu_init_f /* run low-level CPU init code (from flash) */
432 bsr board_init_f /* run low-level board init code (from flash) */
434 /* board_init_f() does not return */
436 /*------------------------------------------------------------------------------*/
439 * void relocate_code (addr_sp, gd, addr_moni)
441 * This "function" does not return, instead it continues in RAM
442 * after relocating the monitor code.
446 * r5 = length in bytes
452 move.l 8(%a6), %sp /* set new stack pointer */
454 move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
455 move.l 16(%a6), %a0 /* Save copy of Destination Address */
457 move.l #CONFIG_SYS_MONITOR_BASE, %a1
458 move.l #__init_end, %a2
461 /* copy the code to RAM */
463 move.l (%a1)+, (%a3)+
468 * We are done. Do not return, instead branch to second part of board
469 * initialization, now running from RAM.
472 add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
479 * Now clear BSS segment
482 add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
484 add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
491 * fix got table in RAM
494 add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
495 move.l %a1,%a5 /* * fix got pointer register a5 */
498 add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
508 /* calculate relative jump to board_init_r in ram */
510 add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
512 /* set parameters for board_init_r */
513 move.l %a0,-(%sp) /* dest_addr */
514 move.l %d0,-(%sp) /* gd */
517 /*------------------------------------------------------------------------------*/
539 /*------------------------------------------------------------------------------*/
541 .globl version_string
543 .ascii U_BOOT_VERSION
544 .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
545 .ascii CONFIG_IDENT_STRING, "\0"