2 * MCF5274/5 Internal Memory Map
4 * Copyright (c) 2005 Arthur Shipkowski <art@videon-central.com>
5 * Based on work Copyright (c) 2003 Josef Baumgartner
6 * <josef.baumgartner@telex.de>
8 * SPDX-License-Identifier: GPL-2.0+
11 #ifndef __IMMAP_5275__
12 #define __IMMAP_5275__
14 #define MMAP_SCM (CONFIG_SYS_MBAR + 0x00000000)
15 #define MMAP_SDRAM (CONFIG_SYS_MBAR + 0x00000040)
16 #define MMAP_FBCS (CONFIG_SYS_MBAR + 0x00000080)
17 #define MMAP_DMA0 (CONFIG_SYS_MBAR + 0x00000100)
18 #define MMAP_DMA1 (CONFIG_SYS_MBAR + 0x00000110)
19 #define MMAP_DMA2 (CONFIG_SYS_MBAR + 0x00000120)
20 #define MMAP_DMA3 (CONFIG_SYS_MBAR + 0x00000130)
21 #define MMAP_UART0 (CONFIG_SYS_MBAR + 0x00000200)
22 #define MMAP_UART1 (CONFIG_SYS_MBAR + 0x00000240)
23 #define MMAP_UART2 (CONFIG_SYS_MBAR + 0x00000280)
24 #define MMAP_I2C (CONFIG_SYS_MBAR + 0x00000300)
25 #define MMAP_QSPI (CONFIG_SYS_MBAR + 0x00000340)
26 #define MMAP_DTMR0 (CONFIG_SYS_MBAR + 0x00000400)
27 #define MMAP_DTMR1 (CONFIG_SYS_MBAR + 0x00000440)
28 #define MMAP_DTMR2 (CONFIG_SYS_MBAR + 0x00000480)
29 #define MMAP_DTMR3 (CONFIG_SYS_MBAR + 0x000004C0)
30 #define MMAP_INTC0 (CONFIG_SYS_MBAR + 0x00000C00)
31 #define MMAP_INTC1 (CONFIG_SYS_MBAR + 0x00000D00)
32 #define MMAP_INTCACK (CONFIG_SYS_MBAR + 0x00000F00)
33 #define MMAP_FEC0 (CONFIG_SYS_MBAR + 0x00001000)
34 #define MMAP_FEC0FIFO (CONFIG_SYS_MBAR + 0x00001400)
35 #define MMAP_FEC1 (CONFIG_SYS_MBAR + 0x00001800)
36 #define MMAP_FEC1FIFO (CONFIG_SYS_MBAR + 0x00001C00)
37 #define MMAP_GPIO (CONFIG_SYS_MBAR + 0x00100000)
38 #define MMAP_RCM (CONFIG_SYS_MBAR + 0x00110000)
39 #define MMAP_CCM (CONFIG_SYS_MBAR + 0x00110004)
40 #define MMAP_PLL (CONFIG_SYS_MBAR + 0x00120000)
41 #define MMAP_EPORT (CONFIG_SYS_MBAR + 0x00130000)
42 #define MMAP_WDOG (CONFIG_SYS_MBAR + 0x00140000)
43 #define MMAP_PIT0 (CONFIG_SYS_MBAR + 0x00150000)
44 #define MMAP_PIT1 (CONFIG_SYS_MBAR + 0x00160000)
45 #define MMAP_PIT2 (CONFIG_SYS_MBAR + 0x00170000)
46 #define MMAP_PIT3 (CONFIG_SYS_MBAR + 0x00180000)
47 #define MMAP_MDHA (CONFIG_SYS_MBAR + 0x00190000)
48 #define MMAP_RNG (CONFIG_SYS_MBAR + 0x001A0000)
49 #define MMAP_SKHA (CONFIG_SYS_MBAR + 0x001B0000)
50 #define MMAP_USB (CONFIG_SYS_MBAR + 0x001C0000)
51 #define MMAP_PWM0 (CONFIG_SYS_MBAR + 0x001D0000)
53 #include <asm/coldfire/eport.h>
54 #include <asm/coldfire/flexbus.h>
55 #include <asm/coldfire/intctrl.h>
56 #include <asm/coldfire/mdha.h>
57 #include <asm/coldfire/pwm.h>
58 #include <asm/coldfire/qspi.h>
59 #include <asm/coldfire/rng.h>
60 #include <asm/coldfire/skha.h>
62 /* System configuration registers
64 typedef struct sys_ctrl {
92 /* SDRAM controller registers, offset: 0x040
94 typedef struct sdram_ctrl {
105 /* DMA module registers, offset 0x100
107 typedef struct dma_ctrl {
114 /* GPIO port registers
116 typedef struct gpio_ctrl {
117 /* Port Output Data Registers */
140 /* Port Data Direction Registers */
163 /* Port Pin Data/Set Registers */
186 /* Port Clear Output Data Registers */
209 /* Pin Assignment Registers */
227 /* Watchdog registers
229 typedef struct wdog_ctrl {
237 /* USB module registers
339 /* PLL module registers
341 typedef struct pll_ctrl {
351 #endif /* __IMMAP_5275__ */