4 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
5 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
7 * SPDX-License-Identifier: GPL-2.0+
10 #ifndef __ASM_M68K_IO_H__
11 #define __ASM_M68K_IO_H__
13 #include <asm/byteorder.h>
19 #define __raw_readb(addr) (*(volatile u8 *)(addr))
20 #define __raw_readw(addr) (*(volatile u16 *)(addr))
21 #define __raw_readl(addr) (*(volatile u32 *)(addr))
23 #define __raw_writeb(b,addr) ((*(volatile u8 *) (addr)) = (b))
24 #define __raw_writew(w,addr) ((*(volatile u16 *) (addr)) = (w))
25 #define __raw_writel(l,addr) ((*(volatile u32 *) (addr)) = (l))
27 #define readb(addr) in_8((volatile u8 *)(addr))
28 #define writeb(b,addr) out_8((volatile u8 *)(addr), (b))
29 #if !defined(__BIG_ENDIAN)
30 #define readw(addr) (*(volatile u16 *) (addr))
31 #define readl(addr) (*(volatile u32 *) (addr))
32 #define writew(b,addr) ((*(volatile u16 *) (addr)) = (b))
33 #define writel(b,addr) ((*(volatile u32 *) (addr)) = (b))
35 #define readw(addr) in_le16((volatile u16 *)(addr))
36 #define readl(addr) in_le32((volatile u32 *)(addr))
37 #define writew(b,addr) out_le16((volatile u16 *)(addr),(b))
38 #define writel(b,addr) out_le32((volatile u32 *)(addr),(b))
42 * The insw/outsw/insl/outsl macros don't do byte-swapping.
43 * They are only used in practice for transferring buffers which
44 * are arrays of bytes, and byte-swapping is not appropriate in
47 #define insb(port, buf, ns) _insb((u8 *)((port)+_IO_BASE), (buf), (ns))
48 #define outsb(port, buf, ns) _outsb((u8 *)((port)+_IO_BASE), (buf), (ns))
49 #define insw(port, buf, ns) _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
50 #define outsw(port, buf, ns) _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
51 #define insl(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
52 #define outsl(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
54 #define inb(port) in_8((u8 *)((port)+_IO_BASE))
55 #define outb(val, port) out_8((u8 *)((port)+_IO_BASE), (val))
56 #if !defined(__BIG_ENDIAN)
57 #define inw(port) in_be16((u16 *)((port)+_IO_BASE))
58 #define outw(val, port) out_be16((u16 *)((port)+_IO_BASE), (val))
59 #define inl(port) in_be32((u32 *)((port)+_IO_BASE))
60 #define outl(val, port) out_be32((u32 *)((port)+_IO_BASE), (val))
62 #define inw(port) in_le16((u16 *)((port)+_IO_BASE))
63 #define outw(val, port) out_le16((u16 *)((port)+_IO_BASE), (val))
64 #define inl(port) in_le32((u32 *)((port)+_IO_BASE))
65 #define outl(val, port) out_le32((u32 *)((port)+_IO_BASE), (val))
68 #define mb() __asm__ __volatile__ ("" : : : "memory")
70 extern inline void _insb(volatile u8 * port, void *buf, int ns)
72 u8 *data = (u8 *) buf;
77 extern inline void _outsb(volatile u8 * port, const void *buf, int ns)
79 u8 *data = (u8 *) buf;
84 extern inline void _insw(volatile u16 * port, void *buf, int ns)
86 u16 *data = (u16 *) buf;
88 *data++ = __sw16(*port);
91 extern inline void _outsw(volatile u16 * port, const void *buf, int ns)
93 u16 *data = (u16 *) buf;
95 *port = __sw16(*data);
100 extern inline void _insl(volatile u32 * port, void *buf, int nl)
102 u32 *data = (u32 *) buf;
104 *data++ = __sw32(*port);
107 extern inline void _outsl(volatile u32 * port, const void *buf, int nl)
109 u32 *data = (u32 *) buf;
111 *port = __sw32(*data);
116 extern inline void _insw_ns(volatile u16 * port, void *buf, int ns)
118 u16 *data = (u16 *) buf;
123 extern inline void _outsw_ns(volatile u16 * port, const void *buf, int ns)
125 u16 *data = (u16 *) buf;
131 extern inline void _insl_ns(volatile u32 * port, void *buf, int nl)
133 u32 *data = (u32 *) buf;
138 extern inline void _outsl_ns(volatile u32 * port, const void *buf, int nl)
140 u32 *data = (u32 *) buf;
148 * The *_ns versions below don't do byte-swapping.
149 * Neither do the standard versions now, these are just here
152 #define insw_ns(port, buf, ns) _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
153 #define outsw_ns(port, buf, ns) _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
154 #define insl_ns(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
155 #define outsl_ns(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
157 #define IO_SPACE_LIMIT ~0
160 * 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
162 extern inline int in_8(volatile u8 * addr)
167 extern inline void out_8(volatile u8 * addr, int val)
172 extern inline int in_le16(volatile u16 * addr)
174 return __sw16(*addr);
177 extern inline int in_be16(volatile u16 * addr)
179 return (*addr & 0xFFFF);
182 extern inline void out_le16(volatile u16 * addr, int val)
187 extern inline void out_be16(volatile u16 * addr, int val)
192 extern inline unsigned in_le32(volatile u32 * addr)
194 return __sw32(*addr);
197 extern inline unsigned in_be32(volatile u32 * addr)
202 extern inline void out_le32(volatile unsigned *addr, int val)
207 extern inline void out_be32(volatile unsigned *addr, int val)
212 /* Clear and set bits in one shot. These macros can be used to clear and
213 * set multiple bits in a register using a single call. These macros can
214 * also be used to set a multiple-bit bit pattern using a mask, by
215 * specifying the mask in the 'clear' parameter and the new bit pattern
216 * in the 'set' parameter.
219 #define clrbits(type, addr, clear) \
220 out_##type((addr), in_##type(addr) & ~(clear))
222 #define setbits(type, addr, set) \
223 out_##type((addr), in_##type(addr) | (set))
225 #define clrsetbits(type, addr, clear, set) \
226 out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
228 #define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
229 #define setbits_be32(addr, set) setbits(be32, addr, set)
230 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
232 #define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
233 #define setbits_le32(addr, set) setbits(le32, addr, set)
234 #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
236 #define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
237 #define setbits_be16(addr, set) setbits(be16, addr, set)
238 #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
240 #define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
241 #define setbits_le16(addr, set) setbits(le16, addr, set)
242 #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
244 #define clrbits_8(addr, clear) clrbits(8, addr, clear)
245 #define setbits_8(addr, set) setbits(8, addr, set)
246 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
248 static inline void sync(void)
250 /* This sync function is for PowerPC or other architecture instruction
251 * ColdFire does not have this instruction. Dummy function, added for
252 * compatibility (CFI driver)
257 * Given a physical address and a length, return a virtual address
258 * that can be used to access the memory range with the caching
259 * properties specified by "flags".
261 #define MAP_NOCACHE (0)
262 #define MAP_WRCOMBINE (0)
263 #define MAP_WRBACK (0)
264 #define MAP_WRTHROUGH (0)
266 static inline void *map_physmem(phys_addr_t paddr, unsigned long len,
269 return (void *)paddr;
273 * Take down a mapping set up by map_physmem().
275 static inline void unmap_physmem(void *vaddr, unsigned long flags)
280 static inline phys_addr_t virt_to_phys(void * vaddr)
282 return (phys_addr_t)(vaddr);
285 #endif /* __ASM_M68K_IO_H__ */