2 * (C) Copyright 2007 Michal Simek
3 * (C) Copyright 2004 Atmark Techno, Inc.
5 * Michal SIMEK <monstr@monstr.eu>
6 * Yasushi SHOJI <yashi@atmark-techno.com>
8 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm-offsets.h>
19 * r10: Stores little/big endian offset for vectors
20 * r2: Stores imm opcode
21 * r3: Stores brai opcode
24 mts rmsr, r0 /* disable cache */
28 /* TODO: Redo this code to call board_init_f_*() */
29 #if defined(CONFIG_SPL_BUILD)
30 addi r1, r0, CONFIG_SPL_STACK_ADDR
32 addi r1, r1, -4 /* Decrement SP to top of memory */
34 #if CONFIG_VAL(SYS_MALLOC_F_LEN)
35 addi r1, r0, CONFIG_SYS_INIT_SP_OFFSET - CONFIG_VAL(SYS_MALLOC_F_LEN)
37 addi r1, r0, CONFIG_SYS_INIT_SP_OFFSET
40 addi r1, r1, -4 /* Decrement SP to top of memory */
42 /* Find-out if u-boot is running on BIG/LITTLE endian platform
43 * There are some steps which is necessary to keep in mind:
44 * 1. Setup offset value to r6
45 * 2. Store word offset value to address 0x0
46 * 3. Load just byte from address 0x0
47 * 4a) LITTLE endian - r10 contains 0x2 because it is the smallest
48 * value that's why is on address 0x0
49 * 4b) BIG endian - r10 contains 0x0 because 0x2 offset is on addr 0x3
51 addik r6, r0, 0x2 /* BIG/LITTLE endian offset */
53 swi r6, r0, 0x28 /* used first unused MB vector */
54 lbui r10, r0, 0x28 /* used first unused MB vector */
57 /* add opcode instruction for 32bit jump - 2 instruction imm & brai */
58 addi r2, r0, 0xb0000000 /* hex b000 opcode imm */
59 addi r3, r0, 0xb8080000 /* hew b808 opcode brai */
61 #ifdef CONFIG_SYS_RESET_ADDRESS
63 swi r2, r0, 0x0 /* reset address - imm opcode */
64 swi r3, r0, 0x4 /* reset address - brai opcode */
66 addik r6, r0, CONFIG_SYS_RESET_ADDRESS
75 #ifdef CONFIG_SYS_USR_EXCEP
76 /* user_vector_exception */
77 swi r2, r0, 0x8 /* user vector exception - imm opcode */
78 swi r3, r0, 0xC /* user vector exception - brai opcode */
80 addik r6, r0, _exception_handler
83 * BIG ENDIAN memory map for user exception
87 * then it is necessary to count address for storing the most significant
88 * 16bits from _exception_handler address and copy it to
89 * 0xa address. Big endian use offset in r10=0 that's why is it just
90 * 0xa address. The same is done for the least significant 16 bits
93 * LITTLE ENDIAN memory map for user exception
97 * Offset is for little endian setup to 0x2. rsubi instruction decrease
98 * address value to ensure that points to proper place which is
99 * 0x8 for the most significant 16 bits and
100 * 0xC for the least significant 16 bits
109 /* interrupt_handler */
110 swi r2, r0, 0x10 /* interrupt - imm opcode */
111 swi r3, r0, 0x14 /* interrupt - brai opcode */
113 addik r6, r0, _interrupt_handler
121 /* hardware exception */
122 swi r2, r0, 0x20 /* hardware exception - imm opcode */
123 swi r3, r0, 0x24 /* hardware exception - brai opcode */
125 addik r6, r0, _hw_exception_handler
132 #endif /* CONFIG_SPL_BUILD */
134 /* Flush cache before enable cache */
136 addik r6, r0, XILINX_DCACHE_BYTE_SIZE
137 bralid r15, flush_cache
140 /* enable instruction and data cache */
145 /* TODO: Redo this code to call board_init_f_*() */
147 /* clear BSS segments */
148 addi r5, r0, __bss_start
149 addi r4, r0, __bss_end
153 swi r0, r5, 0 /* write zero to loc */
154 addi r5, r5, 4 /* increment to next loc */
155 cmp r6, r5, r4 /* check if we have reach the end */
157 3: /* jumping to board_init */
158 #ifdef CONFIG_DEBUG_UART
159 bralid r15, debug_uart_init
162 #ifndef CONFIG_SPL_BUILD
163 or r5, r0, r0 /* flags - empty */
165 #if CONFIG_VAL(SYS_MALLOC_F_LEN)
166 addi r6, r0, CONFIG_SYS_INIT_SP_OFFSET
167 swi r6, r31, GD_MALLOC_BASE
172 #if CONFIG_VAL(SYS_MALLOC_F_LEN)
173 addi r6, r0, CONFIG_SPL_STACK_ADDR
174 swi r6, r31, GD_MALLOC_BASE
183 .space GENERATED_GBL_DATA_SIZE
185 #ifndef CONFIG_SPL_BUILD
187 * Read 16bit little endian
203 * Write 16bit little endian
204 * first parameter(r5) - address, second(r6) - short value
210 out16: bslli r3, r6, 8
223 .global relocate_code
232 addi r1, r5, 0 /* Start to use new SP */
233 addi r31, r6, 0 /* Start to use new GD */
235 add r23, r0, r7 /* Move reloc addr to r23 */
236 /* Relocate text and data - r12 temp value */
238 addi r22, r0, __end - 4 /* Include BSS too */
242 1: lw r12, r21, r5 /* Load u-boot data */
243 sw r12, r23, r5 /* Write zero to loc */
244 cmp r12, r5, r6 /* Check if we have reach the end */
246 addi r5, r5, 4 /* Increment to next loc - relocate code */
248 /* R23 points to the base address. */
249 add r23, r0, r7 /* Move reloc addr to r23 */
250 addi r24, r0, CONFIG_SYS_TEXT_BASE /* Get reloc offset */
251 rsub r23, r24, r23 /* keep - this is already here gd->reloc_off */
253 addik r6, r0, 0x2 /* BIG/LITTLE endian offset */
255 swi r6, r0, 0x28 /* used first unused MB vector */
256 lbui r10, r0, 0x28 /* used first unused MB vector */
259 #ifdef CONFIG_SYS_USR_EXCEP
260 addik r6, r0, _exception_handler
261 addk r6, r6, r23 /* add offset */
269 addik r6, r0, _hw_exception_handler
270 addk r6, r6, r23 /* add offset */
278 addik r6, r0, _interrupt_handler
279 addk r6, r6, r23 /* add offset */
287 /* Check if GOT exist */
288 addik r21, r23, _got_start
289 addik r22, r23, _got_end
291 beqi r12, 2f /* No GOT table - jump over */
293 /* Skip last 3 entries plus 1 because of loop boundary below */
294 addik r22, r22, -0x10
296 /* Relocate the GOT. */
297 3: lw r12, r21, r0 /* Load entry */
298 addk r12, r12, r23 /* Add reloc offset */
299 sw r12, r21, r0 /* Save entry back */
301 cmpu r12, r21, r22 /* Check if this cross boundary */
305 /* Update pointer to GOT */
307 addik r20, r20, _GLOBAL_OFFSET_TABLE_ + 8
310 /* Flush caches to ensure consistency */
312 addik r6, r0, XILINX_DCACHE_BYTE_SIZE
313 bralid r15, flush_cache
316 2: addi r5, r31, 0 /* gd is initialized in board_r.c */
317 addi r6, r0, CONFIG_SYS_TEXT_BASE
318 addi r12, r23, board_init_r
319 bra r12 /* Jump to relocated code */