git.sur5r.net Git - u-boot/blob - arch/mips/dts/ar933x.dtsi

   1 /*
   2  * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
   3  *
   4  * SPDX-License-Identifier: GPL-2.0+
   5  */
   6
   7 #include <dt-bindings/interrupt-controller/irq.h>
   8 #include "skeleton.dtsi"
   9
  10 / {
  11         compatible = "qca,ar933x";
  12
  13         #address-cells = <1>;
  14         #size-cells = <1>;
  15
  16         cpus {
  17                 #address-cells = <1>;
  18                 #size-cells = <0>;
  19
  20                 cpu@0 {
  21                         device_type = "cpu";
  22                         compatible = "mips,mips24Kc";
  23                         reg = <0>;
  24                 };
  25         };
  26
  27         clocks {
  28                 #address-cells = <1>;
  29                 #size-cells = <1>;
  30                 ranges;
  31
  32                 xtal: xtal {
  33                         #clock-cells = <0>;
  34                         compatible = "fixed-clock";
  35                         clock-output-names = "xtal";
  36                 };
  37         };
  38
  39         pinctrl {
  40                 u-boot,dm-pre-reloc;
  41                 compatible = "qca,ar933x-pinctrl";
  42                 ranges;
  43                 #address-cells = <1>;
  44                 #size-cells = <1>;
  45                 reg = <0x18040000 0x100>;
  46         };
  47
  48         ahb {
  49                 compatible = "simple-bus";
  50                 ranges;
  51
  52                 #address-cells = <1>;
  53                 #size-cells = <1>;
  54
  55                 apb {
  56                         compatible = "simple-bus";
  57                         ranges;
  58
  59                         #address-cells = <1>;
  60                         #size-cells = <1>;
  61
  62                         ehci0: ehci@1b000100 {
  63                                 compatible = "generic-ehci";
  64                                 reg = <0x1b000100 0x100>;
  65
  66                                 status = "disabled";
  67                         };
  68
  69                         uart0: uart@18020000 {
  70                                 compatible = "qca,ar9330-uart";
  71                                 reg = <0x18020000 0x20>;
  72                                 interrupts = <128 IRQ_TYPE_LEVEL_HIGH>;
  73
  74                                 status = "disabled";
  75                         };
  76
  77                         gmac0: eth@0x19000000 {
  78                                 compatible = "qca,ag933x-mac";
  79                                 reg = <0x19000000 0x200>;
  80                                 phy = <&phy0>;
  81                                 phy-mode = "rmii";
  82
  83                                 status = "disabled";
  84
  85                                 mdio {
  86                                         #address-cells = <1>;
  87                                         #size-cells = <0>;
  88                                         phy0: ethernet-phy@0 {
  89                                                 reg = <0>;
  90                                         };
  91                                 };
  92                         };
  93
  94                         gmac1: eth@0x1a000000 {
  95                                 compatible = "qca,ag933x-mac";
  96                                 reg = <0x1a000000 0x200>;
  97                                 phy = <&phy0>;
  98                                 phy-mode = "rgmii";
  99
 100                                 status = "disabled";
 101                         };
 102                 };
 103
 104                 spi0: spi@1f000000 {
 105                         compatible = "qca,ar7100-spi";
 106                         reg = <0x1f000000 0x10>;
 107                         interrupts = <129 IRQ_TYPE_LEVEL_HIGH>;
 108
 109                         status = "disabled";
 110
 111                         #address-cells = <1>;
 112                         #size-cells = <0>;
 113                 };
 114         };
 115 };