git.sur5r.net Git - u-boot/blob - arch/mips/dts/brcm,bcm6328.dtsi

   1 /*
   2  * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <dt-bindings/clock/bcm6328-clock.h>
   8 #include <dt-bindings/gpio/gpio.h>
   9 #include <dt-bindings/power-domain/bcm6328-power-domain.h>
  10 #include <dt-bindings/reset/bcm6328-reset.h>
  11 #include "skeleton.dtsi"
  12
  13 / {
  14         compatible = "brcm,bcm6328";
  15
  16         cpus {
  17                 reg = <0x10000000 0x4>;
  18                 #address-cells = <1>;
  19                 #size-cells = <0>;
  20                 u-boot,dm-pre-reloc;
  21
  22                 cpu@0 {
  23                         compatible = "brcm,bcm6328-cpu", "mips,mips4Kc";
  24                         device_type = "cpu";
  25                         reg = <0>;
  26                         u-boot,dm-pre-reloc;
  27                 };
  28
  29                 cpu@1 {
  30                         compatible = "brcm,bcm6328-cpu", "mips,mips4Kc";
  31                         device_type = "cpu";
  32                         reg = <1>;
  33                         u-boot,dm-pre-reloc;
  34                 };
  35         };
  36
  37         clocks {
  38                 compatible = "simple-bus";
  39                 #address-cells = <1>;
  40                 #size-cells = <1>;
  41                 u-boot,dm-pre-reloc;
  42
  43                 periph_osc: periph-osc {
  44                         compatible = "fixed-clock";
  45                         #clock-cells = <0>;
  46                         clock-frequency = <50000000>;
  47                         u-boot,dm-pre-reloc;
  48                 };
  49
  50                 periph_clk: periph-clk {
  51                         compatible = "brcm,bcm6345-clk";
  52                         reg = <0x10000004 0x4>;
  53                         #clock-cells = <1>;
  54                 };
  55         };
  56
  57         ubus {
  58                 compatible = "simple-bus";
  59                 #address-cells = <1>;
  60                 #size-cells = <1>;
  61                 u-boot,dm-pre-reloc;
  62
  63                 periph_rst: reset-controller@10000010 {
  64                         compatible = "brcm,bcm6345-reset";
  65                         reg = <0x10000010 0x4>;
  66                         #reset-cells = <1>;
  67                 };
  68
  69                 pll_cntl: syscon@10000068 {
  70                         compatible = "syscon";
  71                         reg = <0x10000068 0x4>;
  72                 };
  73
  74                 syscon-reboot {
  75                         compatible = "syscon-reboot";
  76                         regmap = <&pll_cntl>;
  77                         offset = <0x0>;
  78                         mask = <0x1>;
  79                 };
  80
  81                 wdt: watchdog@1000005c {
  82                         compatible = "brcm,bcm6345-wdt";
  83                         reg = <0x1000005c 0xc>;
  84                         clocks = <&periph_osc>;
  85                 };
  86
  87                 wdt-reboot {
  88                         compatible = "wdt-reboot";
  89                         wdt = <&wdt>;
  90                 };
  91
  92                 gpio: gpio-controller@10000084 {
  93                         compatible = "brcm,bcm6345-gpio";
  94                         reg = <0x10000084 0x4>, <0x1000008c 0x4>;
  95                         gpio-controller;
  96                         #gpio-cells = <2>;
  97
  98                         status = "disabled";
  99                 };
 100
 101                 uart0: serial@10000100 {
 102                         compatible = "brcm,bcm6345-uart";
 103                         reg = <0x10000100 0x18>;
 104                         clocks = <&periph_osc>;
 105
 106                         status = "disabled";
 107                 };
 108
 109                 uart1: serial@10000120 {
 110                         compatible = "brcm,bcm6345-uart";
 111                         reg = <0x10000120 0x18>;
 112                         clocks = <&periph_osc>;
 113
 114                         status = "disabled";
 115                 };
 116
 117                 leds: led-controller@10000800 {
 118                         compatible = "brcm,bcm6328-leds";
 119                         reg = <0x10000800 0x24>;
 120                         #address-cells = <1>;
 121                         #size-cells = <0>;
 122
 123                         status = "disabled";
 124                 };
 125
 126                 periph_pwr: power-controller@10001848 {
 127                         compatible = "brcm,bcm6328-power-domain";
 128                         reg = <0x10001848 0x4>;
 129                         #power-domain-cells = <1>;
 130                 };
 131
 132                 memory-controller@10003000 {
 133                         compatible = "brcm,bcm6328-mc";
 134                         reg = <0x10003000 0x864>;
 135                         u-boot,dm-pre-reloc;
 136                 };
 137         };
 138 };