1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2018 Ã
\81lvaro Fernández Rojas <noltari@gmail.com>
6 #include <dt-bindings/clock/bcm6362-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/power-domain/bcm6362-power-domain.h>
9 #include <dt-bindings/reset/bcm6362-reset.h>
10 #include "skeleton.dtsi"
13 compatible = "brcm,bcm6362";
21 reg = <0x10000000 0x4>;
27 compatible = "brcm,bcm6362-cpu", "mips,mips4Kc";
34 compatible = "brcm,bcm6362-cpu", "mips,mips4Kc";
42 compatible = "simple-bus";
47 hsspi_pll: hsspi-pll {
48 compatible = "fixed-clock";
50 clock-frequency = <133333333>;
53 periph_osc: periph-osc {
54 compatible = "fixed-clock";
56 clock-frequency = <50000000>;
60 periph_clk: periph-clk {
61 compatible = "brcm,bcm6345-clk";
62 reg = <0x10000004 0x4>;
68 compatible = "simple-bus";
73 pll_cntl: syscon@10000008 {
74 compatible = "syscon";
75 reg = <0x10000008 0x4>;
79 compatible = "syscon-reboot";
85 periph_rst: reset-controller@10000010 {
86 compatible = "brcm,bcm6345-reset";
87 reg = <0x10000010 0x4>;
91 wdt: watchdog@1000005c {
92 compatible = "brcm,bcm6345-wdt";
93 reg = <0x1000005c 0xc>;
94 clocks = <&periph_osc>;
98 compatible = "wdt-reboot";
102 gpio1: gpio-controller@10000080 {
103 compatible = "brcm,bcm6345-gpio";
104 reg = <0x10000080 0x4>, <0x10000088 0x4>;
112 gpio0: gpio-controller@10000084 {
113 compatible = "brcm,bcm6345-gpio";
114 reg = <0x10000084 0x4>, <0x1000008c 0x4>;
121 uart0: serial@10000100 {
122 compatible = "brcm,bcm6345-uart";
123 reg = <0x10000100 0x18>;
124 clocks = <&periph_osc>;
129 uart1: serial@10000120 {
130 compatible = "brcm,bcm6345-uart";
131 reg = <0x10000120 0x18>;
132 clocks = <&periph_osc>;
137 lsspi: spi@10000800 {
138 compatible = "brcm,bcm6358-spi";
139 reg = <0x10000800 0x70c>;
140 #address-cells = <1>;
142 clocks = <&periph_clk BCM6362_CLK_SPI>;
143 resets = <&periph_rst BCM6362_RST_SPI>;
144 spi-max-frequency = <20000000>;
150 hsspi: spi@10001000 {
151 compatible = "brcm,bcm6328-hsspi";
152 #address-cells = <1>;
154 reg = <0x10001000 0x600>;
155 clocks = <&periph_clk BCM6362_CLK_HSSPI>, <&hsspi_pll>;
156 clock-names = "hsspi", "pll";
157 resets = <&periph_rst BCM6362_RST_SPI>;
158 spi-max-frequency = <50000000>;
164 leds: led-controller@10001900 {
165 compatible = "brcm,bcm6328-leds";
166 reg = <0x10001900 0x24>;
167 #address-cells = <1>;
173 periph_pwr: power-controller@10001848 {
174 compatible = "brcm,bcm6328-power-domain";
175 reg = <0x10001848 0x4>;
176 #power-domain-cells = <1>;
179 ehci: usb-controller@10002500 {
180 compatible = "brcm,bcm6362-ehci", "generic-ehci";
181 reg = <0x10002500 0x100>;
188 ohci: usb-controller@10002600 {
189 compatible = "brcm,bcm6362-ohci", "generic-ohci";
190 reg = <0x10002600 0x100>;
197 usbh: usb-phy@10002700 {
198 compatible = "brcm,bcm6368-usbh";
199 reg = <0x10002700 0x38>;
201 clocks = <&periph_clk BCM6362_CLK_USBH>;
202 clock-names = "usbh";
203 power-domains = <&periph_pwr BCM6362_PWR_USBH>;
204 resets = <&periph_rst BCM6362_RST_USBH>;
209 memory-controller@10003000 {
210 compatible = "brcm,bcm6328-mc";
211 reg = <0x10003000 0x864>;