2 * linux/include/asm-nds/io.h
4 * Copyright (C) 1996-2000 Russell King
6 * Copyright (C) 2011 Andes Technology Corporation
7 * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
8 * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both
16 * constant addresses and variable addresses.
17 * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture
18 * specific IO header files.
19 * 27-Mar-1999 PJB Second parameter of memcpy_toio is const..
20 * 04-Apr-1999 PJB Added check_signature.
21 * 12-Dec-1999 RMK More cleanups
22 * 18-Jun-2000 RMK Removed virt_to_* and friends definitions
24 #ifndef __ASM_NDS_IO_H
25 #define __ASM_NDS_IO_H
29 * - do not implement for NDS32 Arch yet.
30 * - cmd_pci.c, cmd_scsi.c, Lynxkdi.c, usb.c, usb_storage.c, etc...
36 #include <linux/types.h>
37 #include <asm/byteorder.h>
39 static inline void sync(void)
44 * Given a physical address and a length, return a virtual address
45 * that can be used to access the memory range with the caching
46 * properties specified by "flags".
48 #define MAP_NOCACHE (0)
49 #define MAP_WRCOMBINE (0)
50 #define MAP_WRBACK (0)
51 #define MAP_WRTHROUGH (0)
54 map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
60 * Take down a mapping set up by map_physmem().
62 static inline void unmap_physmem(void *vaddr, unsigned long flags)
67 static inline phys_addr_t virt_to_phys(void *vaddr)
69 return (phys_addr_t)(vaddr);
73 * Generic virtual read/write. Note that we don't support half-word
74 * read/writes. We define __arch_*[bl] here, and leave __arch_*w
75 * to the architecture specific code.
77 #define __arch_getb(a) (*(unsigned char *)(a))
78 #define __arch_getw(a) (*(unsigned short *)(a))
79 #define __arch_getl(a) (*(unsigned int *)(a))
81 #define __arch_putb(v, a) (*(unsigned char *)(a) = (v))
82 #define __arch_putw(v, a) (*(unsigned short *)(a) = (v))
83 #define __arch_putl(v, a) (*(unsigned int *)(a) = (v))
85 extern void __raw_writesb(unsigned int addr, const void *data, int bytelen);
86 extern void __raw_writesw(unsigned int addr, const void *data, int wordlen);
87 extern void __raw_writesl(unsigned int addr, const void *data, int longlen);
89 extern void __raw_readsb(unsigned int addr, void *data, int bytelen);
90 extern void __raw_readsw(unsigned int addr, void *data, int wordlen);
91 extern void __raw_readsl(unsigned int addr, void *data, int longlen);
93 #define __raw_writeb(v, a) __arch_putb(v, a)
94 #define __raw_writew(v, a) __arch_putw(v, a)
95 #define __raw_writel(v, a) __arch_putl(v, a)
97 #define __raw_readb(a) __arch_getb(a)
98 #define __raw_readw(a) __arch_getw(a)
99 #define __raw_readl(a) __arch_getl(a)
102 * TODO: The kernel offers some more advanced versions of barriers, it might
103 * have some advantages to use them instead of the simple one here.
105 #define dmb() __asm__ __volatile__ ("" : : : "memory")
106 #define __iormb() dmb()
107 #define __iowmb() dmb()
109 static inline void writeb(unsigned char val, unsigned char *addr)
112 __arch_putb(val, addr);
115 static inline void writew(unsigned short val, unsigned short *addr)
118 __arch_putw(val, addr);
122 static inline void writel(unsigned int val, unsigned int *addr)
125 __arch_putl(val, addr);
128 static inline unsigned char readb(unsigned char *addr)
132 val = __arch_getb(addr);
137 static inline unsigned short readw(unsigned short *addr)
141 val = __arch_getw(addr);
146 static inline unsigned int readl(unsigned int *addr)
150 val = __arch_getl(addr);
156 * The compiler seems to be incapable of optimising constants
157 * properly. Spell it out to the compiler in some cases.
158 * These are only valid for small values of "off" (< 1<<12)
160 #define __raw_base_writeb(val, base, off) __arch_base_putb(val, base, off)
161 #define __raw_base_writew(val, base, off) __arch_base_putw(val, base, off)
162 #define __raw_base_writel(val, base, off) __arch_base_putl(val, base, off)
164 #define __raw_base_readb(base, off) __arch_base_getb(base, off)
165 #define __raw_base_readw(base, off) __arch_base_getw(base, off)
166 #define __raw_base_readl(base, off) __arch_base_getl(base, off)
169 * Now, pick up the machine-defined IO definitions
170 * #include <asm/arch/io.h>
174 * IO port access primitives
175 * -------------------------
177 * The NDS32 doesn't have special IO access instructions just like ARM;
178 * all IO is memory mapped.
179 * Note that these are defined to perform little endian accesses
180 * only. Their primary purpose is to access PCI and ISA peripherals.
182 * Note that for a big endian machine, this implies that the following
183 * big endian mode connectivity is in place, as described by numerious
186 * PCI: D0-D7 D8-D15 D16-D23 D24-D31
187 * ARM: D24-D31 D16-D23 D8-D15 D0-D7
189 * The machine specific io.h include defines __io to translate an "IO"
190 * address to a memory address.
192 * Note that we prevent GCC re-ordering or caching values in expressions
193 * by introducing sequence points into the in*() definitions. Note that
194 * __raw_* do not guarantee this behaviour.
196 * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
199 #define outb(v, p) __raw_writeb(v, __io(p))
200 #define outw(v, p) __raw_writew(cpu_to_le16(v), __io(p))
201 #define outl(v, p) __raw_writel(cpu_to_le32(v), __io(p))
203 #define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; })
204 #define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; })
205 #define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; })
207 #define outsb(p, d, l) writesb(__io(p), d, l)
208 #define outsw(p, d, l) writesw(__io(p), d, l)
209 #define outsl(p, d, l) writesl(__io(p), d, l)
211 #define insb(p, d, l) readsb(__io(p), d, l)
212 #define insw(p, d, l) readsw(__io(p), d, l)
213 #define insl(p, d, l) readsl(__io(p), d, l)
215 static inline void readsb(unsigned int *addr, void * data, int bytelen)
217 unsigned char *ptr = (unsigned char *)addr;
218 unsigned char *ptr2 = (unsigned char *)data;
226 static inline void readsw(unsigned int *addr, void * data, int wordlen)
228 unsigned short *ptr = (unsigned short *)addr;
229 unsigned short *ptr2 = (unsigned short *)data;
237 static inline void readsl(unsigned int *addr, void * data, int longlen)
239 unsigned int *ptr = (unsigned int *)addr;
240 unsigned int *ptr2 = (unsigned int *)data;
247 static inline void writesb(unsigned int *addr, const void * data, int bytelen)
249 unsigned char *ptr = (unsigned char *)addr;
250 unsigned char *ptr2 = (unsigned char *)data;
257 static inline void writesw(unsigned int *addr, const void * data, int wordlen)
259 unsigned short *ptr = (unsigned short *)addr;
260 unsigned short *ptr2 = (unsigned short *)data;
267 static inline void writesl(unsigned int *addr, const void * data, int longlen)
269 unsigned int *ptr = (unsigned int *)addr;
270 unsigned int *ptr2 = (unsigned int *)data;
279 #define outb_p(val, port) outb((val), (port))
280 #define outw_p(val, port) outw((val), (port))
281 #define outl_p(val, port) outl((val), (port))
282 #define inb_p(port) inb((port))
283 #define inw_p(port) inw((port))
284 #define inl_p(port) inl((port))
286 #define outsb_p(port, from, len) outsb(port, from, len)
287 #define outsw_p(port, from, len) outsw(port, from, len)
288 #define outsl_p(port, from, len) outsl(port, from, len)
289 #define insb_p(port, to, len) insb(port, to, len)
290 #define insw_p(port, to, len) insw(port, to, len)
291 #define insl_p(port, to, len) insl(port, to, len)
294 * ioremap and friends.
296 * ioremap takes a PCI memory address, as specified in
297 * linux/Documentation/IO-mapping.txt. If you want a
298 * physical address, use __ioremap instead.
300 extern void *__ioremap(unsigned long offset, size_t size, unsigned long flags);
301 extern void __iounmap(void *addr);
304 * Generic ioremap support.
307 * iomem_valid_addr(off,size)
310 #ifdef iomem_valid_addr
311 #define __arch_ioremap(off, sz, nocache) \
313 unsigned long _off = (off), _size = (sz); \
314 void *_ret = (void *)0; \
315 if (iomem_valid_addr(_off, _size)) \
316 _ret = __ioremap(iomem_to_phys(_off), _size, 0); \
320 #define __arch_iounmap __iounmap
323 #define ioremap(off, sz) __arch_ioremap((off), (sz), 0)
324 #define ioremap_nocache(off, sz) __arch_ioremap((off), (sz), 1)
325 #define iounmap(_addr) __arch_iounmap(_addr)
328 * DMA-consistent mapping functions. These allocate/free a region of
329 * uncached, unwrite-buffered mapped memory space for use with DMA
330 * devices. This is the "generic" version. The PCI specific version
333 extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle);
334 extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle);
335 extern void consistent_sync(void *vaddr, size_t size, int rw);
338 * String version of IO memory access ops:
340 extern void _memcpy_fromio(void *, unsigned long, size_t);
341 extern void _memcpy_toio(unsigned long, const void *, size_t);
342 extern void _memset_io(unsigned long, int, size_t);
344 extern void __readwrite_bug(const char *fn);
347 * If this architecture has PCI memory IO, then define the read/write
348 * macros. These should only be used with the cookie passed from
353 #define readb(c) ({ unsigned int __v = \
354 __raw_readb(__mem_pci(c)); __v; })
355 #define readw(c) ({ unsigned int __v = \
356 le16_to_cpu(__raw_readw(__mem_pci(c))); __v; })
357 #define readl(c) ({ unsigned int __v = \
358 le32_to_cpu(__raw_readl(__mem_pci(c))); __v; })
360 #define writeb(v, c) __raw_writeb(v, __mem_pci(c))
361 #define writew(v, c) __raw_writew(cpu_to_le16(v), __mem_pci(c))
362 #define writel(v, c) __raw_writel(cpu_to_le32(v), __mem_pci(c))
364 #define memset_io(c, v, l) _memset_io(__mem_pci(c), (v), (l))
365 #define memcpy_fromio(a, c, l) _memcpy_fromio((a), __mem_pci(c), (l))
366 #define memcpy_toio(c, a, l) _memcpy_toio(__mem_pci(c), (a), (l))
368 #define eth_io_copy_and_sum(s, c, l, b) \
369 eth_copy_and_sum((s), __mem_pci(c), (l), (b))
372 check_signature(unsigned long io_addr, const unsigned char *signature,
377 if (readb(io_addr) != *signature)
387 #endif /* __mem_pci */
390 * If this architecture has ISA IO, then define the isa_read/isa_write
395 #define isa_readb(addr) __raw_readb(__mem_isa(addr))
396 #define isa_readw(addr) __raw_readw(__mem_isa(addr))
397 #define isa_readl(addr) __raw_readl(__mem_isa(addr))
398 #define isa_writeb(val, addr) __raw_writeb(val, __mem_isa(addr))
399 #define isa_writew(val, addr) __raw_writew(val, __mem_isa(addr))
400 #define isa_writel(val, addr) __raw_writel(val, __mem_isa(addr))
401 #define isa_memset_io(a, b, c) _memset_io(__mem_isa(a), (b), (c))
402 #define isa_memcpy_fromio(a, b, c) _memcpy_fromio((a), __mem_isa(b), (c))
403 #define isa_memcpy_toio(a, b, c) _memcpy_toio(__mem_isa((a)), (b), (c))
405 #define isa_eth_io_copy_and_sum(a, b, c, d) \
406 eth_copy_and_sum((a), __mem_isa(b), (c), (d))
409 isa_check_signature(unsigned long io_addr, const unsigned char *signature,
414 if (isa_readb(io_addr) != *signature)
425 #else /* __mem_isa */
427 #define isa_readb(addr) (__readwrite_bug("isa_readb"), 0)
428 #define isa_readw(addr) (__readwrite_bug("isa_readw"), 0)
429 #define isa_readl(addr) (__readwrite_bug("isa_readl"), 0)
430 #define isa_writeb(val, addr) __readwrite_bug("isa_writeb")
431 #define isa_writew(val, addr) __readwrite_bug("isa_writew")
432 #define isa_writel(val, addr) __readwrite_bug("isa_writel")
433 #define isa_memset_io(a, b, c) __readwrite_bug("isa_memset_io")
434 #define isa_memcpy_fromio(a, b, c) __readwrite_bug("isa_memcpy_fromio")
435 #define isa_memcpy_toio(a, b, c) __readwrite_bug("isa_memcpy_toio")
437 #define isa_eth_io_copy_and_sum(a, b, c, d) \
438 __readwrite_bug("isa_eth_io_copy_and_sum")
440 #define isa_check_signature(io, sig, len) (0)
442 #endif /* __mem_isa */
443 #endif /* __KERNEL__ */
444 #endif /* __ASM_NDS_IO_H */