2 * Copyright (C) 2013 Altera Corporation
4 * This file is generated by sopc2dts.
6 * SPDX-License-Identifier: GPL-2.0+
12 model = "altr,qsys_ghrd_3c120";
13 compatible = "altr,qsys_ghrd_3c120";
23 compatible = "altr,nios2-1.0";
26 #interrupt-cells = <1>;
27 clock-frequency = <125000000>;
28 dcache-line-size = <32>;
29 icache-line-size = <32>;
30 dcache-size = <32768>;
31 icache-size = <32768>;
32 altr,implementation = "fast";
33 altr,pid-num-bits = <8>;
34 altr,tlb-num-ways = <16>;
35 altr,tlb-num-entries = <128>;
36 altr,tlb-ptr-sz = <7>;
39 altr,reset-addr = <0xc2800000>;
40 altr,fast-tlb-miss-addr = <0xc7fff400>;
41 altr,exception-addr = <0xd0000020>;
42 altr,has-initda = <1>;
48 device_type = "memory";
49 reg = <0x10000000 0x08000000>,
50 <0x07fff400 0x00000400>;
58 compatible = "altr,avalon", "simple-bus";
59 bus-frequency = <125000000>;
61 pb_cpu_to_io: bridge@0x8000000 {
62 compatible = "simple-bus";
63 reg = <0x08000000 0x00800000>;
66 ranges = <0x00002000 0x08002000 0x00002000>,
67 <0x00004000 0x08004000 0x00000400>,
68 <0x00004400 0x08004400 0x00000040>,
69 <0x00004800 0x08004800 0x00000040>,
70 <0x00004c80 0x08004c80 0x00000020>,
71 <0x00004cc0 0x08004cc0 0x00000010>,
72 <0x00004ce0 0x08004ce0 0x00000010>,
73 <0x00004d00 0x08004d00 0x00000010>,
74 <0x00004d40 0x08004d40 0x00000008>,
75 <0x00004d50 0x08004d50 0x00000008>,
76 <0x00008000 0x08008000 0x00000020>,
77 <0x00400000 0x08400000 0x00000020>;
79 timer_1ms: timer@0x400000 {
80 compatible = "altr,timer-1.0";
81 reg = <0x00400000 0x00000020>;
82 interrupt-parent = <&cpu>;
84 clock-frequency = <125000000>;
87 timer_0: timer@0x8000 {
88 compatible = "altr,timer-1.0";
89 reg = < 0x00008000 0x00000020 >;
90 interrupt-parent = < &cpu >;
92 clock-frequency = < 125000000 >;
96 compatible = "altr,sysid-1.0";
97 reg = <0x00004d40 0x00000008>;
100 jtag_uart: serial@0x4d50 {
101 compatible = "altr,juart-1.0";
102 reg = <0x00004d50 0x00000008>;
103 interrupt-parent = <&cpu>;
107 tse_mac: ethernet@0x4000 {
108 compatible = "altr,tse-1.0";
109 reg = <0x00004000 0x00000400>,
110 <0x00004400 0x00000040>,
111 <0x00004800 0x00000040>,
112 <0x00002000 0x00002000>;
113 reg-names = "control_port", "rx_csr", "tx_csr", "s1";
114 interrupt-parent = <&cpu>;
116 interrupt-names = "rx_irq", "tx_irq";
117 rx-fifo-depth = <8192>;
118 tx-fifo-depth = <8192>;
119 max-frame-size = <1518>;
120 local-mac-address = [ 00 00 00 00 00 00 ];
121 phy-mode = "rgmii-id";
122 phy-handle = <&phy0>;
124 compatible = "altr,tse-mdio";
125 #address-cells = <1>;
127 phy0: ethernet-phy@18 {
129 device_type = "ethernet-phy";
134 uart: serial@0x4c80 {
135 compatible = "altr,uart-1.0";
136 reg = <0x00004c80 0x00000020>;
137 interrupt-parent = <&cpu>;
139 current-speed = <115200>;
140 clock-frequency = <62500000>;
143 user_led_pio_8out: gpio@0x4cc0 {
144 compatible = "altr,pio-1.0";
145 reg = <0x00004cc0 0x00000010>;
147 altr,gpio-bank-width = <8>;
150 gpio-bank-name = "led";
153 user_dipsw_pio_8in: gpio@0x4ce0 {
154 compatible = "altr,pio-1.0";
155 reg = <0x00004ce0 0x00000010>;
156 interrupt-parent = <&cpu>;
161 altr,gpio-bank-width = <8>;
164 gpio-bank-name = "dipsw";
167 user_pb_pio_4in: gpio@0x4d00 {
168 compatible = "altr,pio-1.0";
169 reg = <0x00004d00 0x00000010>;
170 interrupt-parent = <&cpu>;
175 altr,gpio-bank-width = <4>;
178 gpio-bank-name = "pb";
182 cfi_flash_64m: flash@0x0 {
183 compatible = "cfi-flash";
184 reg = <0x00000000 0x04000000>;
187 #address-cells = <1>;
191 reg = <0x00800000 0x01e00000>;
192 label = "JFFS2 Filesystem";
198 bootargs = "debug console=ttyJ0,115200";
199 stdout-path = &jtag_uart;