2 * Copyright (C) 1998 Dan Malek <dmalek@jlc.net>
3 * Copyright (C) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
4 * Copyright (C) 2000,2001,2002 Wolfgang Denk <wd@denx.de>
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 /* U-Boot - Startup Code for PowerPC based Embedded Boards
28 * The processor starts at 0x00000100 and the code is executed
29 * from flash. The code is organized to be at an other address
30 * in memory, but as long we don't jump around before relocating.
31 * board_init lies at a quite high address and when the cpu has
32 * jumped there, everything is ok.
33 * This works because the cpu gives the FLASH (CS0) the whole
34 * address space at startup, and board_init lies as a echo of
35 * the flash somewhere up there in the memorymap.
37 * board_init will change CS0 to be positioned at the correct
38 * address and (s)dram will be positioned at address 0
40 #include <asm-offsets.h>
45 #define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */
47 #include <ppc_asm.tmpl>
50 #include <asm/cache.h>
52 #include <asm/u-boot.h>
54 /* We don't want the MMU yet.
57 /* FP, Machine Check and Recoverable Interr. */
58 #define MSR_KERNEL ( MSR_FP | MSR_ME | MSR_RI )
61 * Set up GOT: Global Offset Table
63 * Use r12 to access the GOT
66 GOT_ENTRY(_GOT2_TABLE_)
67 GOT_ENTRY(_FIXUP_TABLE_)
70 GOT_ENTRY(_start_of_vectors)
71 GOT_ENTRY(_end_of_vectors)
72 GOT_ENTRY(transfer_to_handler)
75 GOT_ENTRY(__bss_end__)
76 GOT_ENTRY(__bss_start)
77 #if defined(CONFIG_FADS)
78 GOT_ENTRY(environment)
83 * r3 - 1st arg to board_init(): IMMP pointer
84 * r4 - 2nd arg to board_init(): boot flag
87 .long 0x27051956 /* U-Boot Magic Number */
90 .ascii U_BOOT_VERSION_STRING, "\0"
95 /* Initialize machine status; enable machine check interrupt */
96 /*----------------------------------------------------------------------*/
97 li r3, MSR_KERNEL /* Set FP, ME, RI flags */
99 mtspr SRR1, r3 /* Make SRR1 match MSR */
101 addis r0,0,0x0000 /* lets make sure that r0 is really 0 */
102 mtspr HID0, r0 /* disable I and D caches */
104 mfspr r3, ICR /* clear Interrupt Cause Register */
106 mfmsr r3 /* turn off address translation */
112 sync /* the MMU should be off... */
116 #if defined(CONFIG_BMW)
117 bl early_init_f /* Must be ASM: no stack yet! */
120 * Setup BATs - cannot be done in C since we don't have a stack yet
127 ori r3, r3, (MSR_IR | MSR_DR)
129 #if !defined(CONFIG_BMW)
130 /* Enable and invalidate data cache.
134 ori r3, r3, HID0_DCE | HID0_DCI
141 /* Allocate Initial RAM in data cache.
143 lis r3, CONFIG_SYS_INIT_RAM_ADDR@h
144 ori r3, r3, CONFIG_SYS_INIT_RAM_ADDR@l
152 /* Lock way0 in data cache.
161 #endif /* !CONFIG_BMW */
163 * Thisk the stack pointer *somewhere* sensible. Doesnt
164 * matter much where as we'll move it when we relocate
166 lis r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@h
167 ori r1, r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@l
169 li r0, 0 /* Make room for stack frame header and */
170 stwu r0, -4(r1) /* clear final stack frame so that */
171 stwu r0, -4(r1) /* stack backtraces terminate cleanly */
173 /* let the C-code set up the rest */
175 /* Be careful to keep code relocatable ! */
176 /*----------------------------------------------------------------------*/
178 GET_GOT /* initialize GOT access */
181 bl cpu_init_f /* run low-level CPU init code (from Flash) */
183 bl board_init_f /* run 1st part of board init code (from Flash) */
185 /* NOTREACHED - board_init_f() does not return */
188 .globl _start_of_vectors
192 STD_EXCEPTION(EXC_OFF_MACH_CHCK, MachineCheck, MachineCheckException)
194 /* Data Storage exception. "Never" generated on the 860. */
195 STD_EXCEPTION(EXC_OFF_DATA_STOR, DataStorage, UnknownException)
197 /* Instruction Storage exception. "Never" generated on the 860. */
198 STD_EXCEPTION(EXC_OFF_INS_STOR, InstStorage, UnknownException)
200 /* External Interrupt exception. */
201 STD_EXCEPTION(EXC_OFF_EXTERNAL, ExtInterrupt, external_interrupt)
203 /* Alignment exception. */
206 EXCEPTION_PROLOG(SRR0, SRR1)
211 addi r3,r1,STACK_FRAME_OVERHEAD
212 EXC_XFER_TEMPLATE(Alignment, AlignmentException, MSR_KERNEL, COPY_EE)
214 /* Program check exception */
217 EXCEPTION_PROLOG(SRR0, SRR1)
218 addi r3,r1,STACK_FRAME_OVERHEAD
219 EXC_XFER_TEMPLATE(ProgramCheck, ProgramCheckException,
222 /* No FPU on MPC8xx. This exception is not supposed to happen.
224 STD_EXCEPTION(EXC_OFF_FPUNAVAIL, FPUnavailable, UnknownException)
226 /* I guess we could implement decrementer, and may have
227 * to someday for timekeeping.
229 STD_EXCEPTION(EXC_OFF_DECR, Decrementer, timer_interrupt)
230 STD_EXCEPTION(0xa00, Trap_0a, UnknownException)
231 STD_EXCEPTION(0xb00, Trap_0b, UnknownException)
232 STD_EXCEPTION(0xc00, SystemCall, UnknownException)
234 STD_EXCEPTION(EXC_OFF_TRACE, SingleStep, UnknownException)
236 STD_EXCEPTION(EXC_OFF_FPUNASSIST, Trap_0e, UnknownException)
237 STD_EXCEPTION(EXC_OFF_PMI, Trap_0f, UnknownException)
239 STD_EXCEPTION(EXC_OFF_ITME, InstructionTransMiss, UnknownException)
240 STD_EXCEPTION(EXC_OFF_DLTME, DataLoadTransMiss, UnknownException)
241 STD_EXCEPTION(EXC_OFF_DSTME, DataStoreTransMiss, UnknownException)
242 STD_EXCEPTION(EXC_OFF_IABE, InstructionBreakpoint, DebugException)
243 STD_EXCEPTION(EXC_OFF_SMIE, SysManageInt, UnknownException)
244 STD_EXCEPTION(0x1500, Reserved5, UnknownException)
245 STD_EXCEPTION(0x1600, Reserved6, UnknownException)
246 STD_EXCEPTION(0x1700, Reserved7, UnknownException)
247 STD_EXCEPTION(0x1800, Reserved8, UnknownException)
248 STD_EXCEPTION(0x1900, Reserved9, UnknownException)
249 STD_EXCEPTION(0x1a00, ReservedA, UnknownException)
250 STD_EXCEPTION(0x1b00, ReservedB, UnknownException)
251 STD_EXCEPTION(0x1c00, ReservedC, UnknownException)
252 STD_EXCEPTION(0x1d00, ReservedD, UnknownException)
253 STD_EXCEPTION(0x1e00, ReservedE, UnknownException)
254 STD_EXCEPTION(0x1f00, ReservedF, UnknownException)
256 STD_EXCEPTION(EXC_OFF_RMTE, RunModeTrace, UnknownException)
258 .globl _end_of_vectors
265 * This code finishes saving the registers to the exception frame
266 * and jumps to the appropriate handler for the exception.
267 * Register r21 is pointer into trap frame, r1 has new stack pointer.
269 .globl transfer_to_handler
281 mfspr r23,SPRG3 /* if from user, fix up tss.regs */
283 addi r24,r1,STACK_FRAME_OVERHEAD
285 2: addi r2,r23,-TSS /* set r2 to current */
289 andi. r24,r23,0x3f00 /* get vector offset */
293 mtspr SPRG2,r22 /* r1 is now kernel sp */
295 addi r24,r2,TASK_STRUCT_SIZE /* check for kernel stack overflow */
299 bgt stack_ovf /* if r2 < r1 < r2+TASK_STRUCT_SIZE */
301 lwz r24,0(r23) /* virtual address of handler */
302 lwz r23,4(r23) /* where to go when done */
304 ori r20,r20,0x30 /* enable IR, DR */
308 rfi /* jump to handler, enable MMU */
311 mfmsr r28 /* Disable interrupts */
315 SYNC /* Some chip revs need this... */
330 lwz r2,_NIP(r1) /* Restore environment */
344 mfspr r5,HID0 /* turn on the I cache. */
345 ori r5,r5,0x8800 /* Instruction cache only! */
348 and r6,r5,r6 /* clear the invalidate bit */
356 .globl icache_disable
371 srwi r3, r3, 15 /* >>15 & 1=> select bit 16 */
377 mfspr r5,HID0 /* turn on the D cache. */
378 ori r5,r5,0x4400 /* Data cache only! */
379 mfspr r4, PVR /* read PVR */
380 srawi r3, r4, 16 /* shift off the least 16 bits */
381 cmpi 0, 0, r3, 0xC /* Check for Max pvr */
383 ori r5,r5,0x0040 /* setting the DCFA bit, for Max rev 1 errata */
387 and r6,r5,r6 /* clear the invalidate bit */
395 .globl dcache_disable
410 srwi r3, r3, 14 /* >>14 & 1=> select bit 17 */
416 /*TODO : who uses this, what should it do?
427 /*------------------------------------------------------------------------------*/
430 * void relocate_code (addr_sp, gd, addr_moni)
432 * This "function" does not return, instead it continues in RAM
433 * after relocating the monitor code.
437 * r5 = length in bytes
443 mr r1, r3 /* Set new stack pointer */
444 mr r9, r4 /* Save copy of Global Data pointer */
445 mr r10, r5 /* Save copy of Destination Address */
448 mr r3, r5 /* Destination Address */
449 #ifdef CONFIG_SYS_RAMBOOT
450 lis r4, CONFIG_SYS_SDRAM_BASE@h /* Source Address */
451 ori r4, r4, CONFIG_SYS_SDRAM_BASE@l
453 lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */
454 ori r4, r4, CONFIG_SYS_MONITOR_BASE@l
456 lwz r5, GOT(__init_end)
458 li r6, CONFIG_SYS_CACHELINE_SIZE /* Cache Line Size */
463 * New GOT-PTR = (old GOT-PTR - CONFIG_SYS_MONITOR_BASE) + Destination Address
469 /* First our own GOT */
471 /* the the one used by the C code */
481 beq cr1,4f /* In place copy is not necessary */
482 beq 7f /* Protect against 0 count */
501 #if !defined(CONFIG_BMW)
502 /* Unlock the data cache and invalidate locked area */
505 lis r4, CONFIG_SYS_INIT_RAM_ADDR@h
506 ori r4, r4, CONFIG_SYS_INIT_RAM_ADDR@l
516 * Now flush the cache: note that we must start from a cache aligned
517 * address. Otherwise we might miss one cache line.
521 beq 7f /* Always flush prefetch queue in any case */
529 sync /* Wait for all dcbst to complete on bus */
535 7: sync /* Wait for all icbi to complete on bus */
539 * We are done. Do not return, instead branch to second part of board
540 * initialization, now running from RAM.
543 addi r0, r10, in_ram - _start + EXC_OFF_SYS_RESET
550 * Relocation Function, r12 point to got2+0x8000
552 * Adjust got2 pointers, no need to check for 0, this code
553 * already puts a few entries in the table.
555 li r0,__got2_entries@sectoff@l
556 la r3,GOT(_GOT2_TABLE_)
557 lwz r11,GOT(_GOT2_TABLE_)
569 * Now adjust the fixups and the pointers to the fixups
570 * in case we need to move ourselves again.
572 li r0,__fixup_entries@sectoff@l
573 lwz r3,GOT(_FIXUP_TABLE_)
589 * Now clear BSS segment
591 lwz r3,GOT(__bss_start)
592 lwz r4,GOT(__bss_end__)
605 mr r3, r9 /* Global Data pointer */
606 mr r4, r10 /* Destination Address */
610 * Copy exception vector code to low memory
613 * r7: source address, r8: end address, r9: target address
617 mflr r4 /* save link register */
620 lwz r8, GOT(_end_of_vectors)
622 li r9, 0x100 /* reset vector always at 0x100 */
625 bgelr /* return if r7>=r8 - just in case */
635 * relocate `hdlr' and `int_return' entries
637 li r7, .L_MachineCheck - _start + EXC_OFF_SYS_RESET
638 li r8, Alignment - _start + EXC_OFF_SYS_RESET
641 addi r7, r7, 0x100 /* next exception vector */
645 li r7, .L_Alignment - _start + EXC_OFF_SYS_RESET
648 li r7, .L_ProgramCheck - _start + EXC_OFF_SYS_RESET
651 li r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET
652 li r8, SystemCall - _start + EXC_OFF_SYS_RESET
655 addi r7, r7, 0x100 /* next exception vector */
659 li r7, .L_SingleStep - _start + EXC_OFF_SYS_RESET
660 li r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
663 addi r7, r7, 0x100 /* next exception vector */
667 mtlr r4 /* restore link register */
670 /* Setup the BAT registers.
673 lis r4, CONFIG_SYS_IBAT0L@h
674 ori r4, r4, CONFIG_SYS_IBAT0L@l
675 lis r3, CONFIG_SYS_IBAT0U@h
676 ori r3, r3, CONFIG_SYS_IBAT0U@l
681 lis r4, CONFIG_SYS_DBAT0L@h
682 ori r4, r4, CONFIG_SYS_DBAT0L@l
683 lis r3, CONFIG_SYS_DBAT0U@h
684 ori r3, r3, CONFIG_SYS_DBAT0U@l
689 lis r4, CONFIG_SYS_IBAT1L@h
690 ori r4, r4, CONFIG_SYS_IBAT1L@l
691 lis r3, CONFIG_SYS_IBAT1U@h
692 ori r3, r3, CONFIG_SYS_IBAT1U@l
697 lis r4, CONFIG_SYS_DBAT1L@h
698 ori r4, r4, CONFIG_SYS_DBAT1L@l
699 lis r3, CONFIG_SYS_DBAT1U@h
700 ori r3, r3, CONFIG_SYS_DBAT1U@l
705 lis r4, CONFIG_SYS_IBAT2L@h
706 ori r4, r4, CONFIG_SYS_IBAT2L@l
707 lis r3, CONFIG_SYS_IBAT2U@h
708 ori r3, r3, CONFIG_SYS_IBAT2U@l
713 lis r4, CONFIG_SYS_DBAT2L@h
714 ori r4, r4, CONFIG_SYS_DBAT2L@l
715 lis r3, CONFIG_SYS_DBAT2U@h
716 ori r3, r3, CONFIG_SYS_DBAT2U@l
721 lis r4, CONFIG_SYS_IBAT3L@h
722 ori r4, r4, CONFIG_SYS_IBAT3L@l
723 lis r3, CONFIG_SYS_IBAT3U@h
724 ori r3, r3, CONFIG_SYS_IBAT3U@l
729 lis r4, CONFIG_SYS_DBAT3L@h
730 ori r4, r4, CONFIG_SYS_DBAT3L@l
731 lis r3, CONFIG_SYS_DBAT3U@h
732 ori r3, r3, CONFIG_SYS_DBAT3U@l
738 * -> for (val = 0; val < 0x20000; val+=0x1000)