3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de
5 * Copyright 2009 Freescale Semiconductor, Inc.
7 * SPDX-License-Identifier: GPL-2.0+
13 #ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
22 . = CONFIG_SPL_TEXT_BASE;
32 PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
36 __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
37 __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
49 KEEP(*(SORT(.u_boot_list*)));
53 __start___ex_table = .;
54 __ex_table : { *(__ex_table) }
55 __stop___ex_table = .;
60 #ifdef CONFIG_SPL_SKIP_RELOCATE
71 /* For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec */
72 #ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
73 .bootpg ADDR(.text) - 0x1000 :
78 #if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */
79 #ifndef BOOT_PAGE_OFFSET
80 #define BOOT_PAGE_OFFSET 0x1000
82 .bootpg ADDR(.text) + BOOT_PAGE_OFFSET :
84 arch/powerpc/cpu/mpc85xx/start.o (.bootpg)
86 #ifndef RESET_VECTOR_OFFSET
87 #define RESET_VECTOR_OFFSET 0x1ffc /* IFC has 8K sram */
89 #elif defined(CONFIG_FSL_ELBC)
90 #define RESET_VECTOR_OFFSET 0xffc /* LBC has 4k sram */
92 #error unknown NAND controller
94 .resetvec ADDR(.text) + RESET_VECTOR_OFFSET : {
99 #ifndef CONFIG_SPL_SKIP_RELOCATE
101 * Make sure that the bss segment isn't linked at 0x0, otherwise its
102 * address won't be updated during relocation fixups.