1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2010 Freescale Semiconductor, Inc.
9 #include <asm/immap_86xx.h>
10 #include <asm/fsl_serdes.h>
12 #define SRDS1_MAX_LANES 4
13 #define SRDS2_MAX_LANES 4
15 static u32 serdes1_prtcl_map, serdes2_prtcl_map;
17 static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
18 [0x1] = {PCIE1, PCIE1, PCIE1, PCIE1},
19 [0x4] = {PCIE1, PCIE1, PCIE1, PCIE1},
20 [0x7] = {NONE, NONE, NONE, NONE},
23 static u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {
24 [0x0] = {PCIE2, PCIE2, PCIE2, PCIE2},
25 [0x4] = {PCIE2, PCIE2, PCIE2, PCIE2},
26 [0x7] = {NONE, NONE, NONE, NONE},
29 int is_serdes_configured(enum srds_prtcl device)
33 if (!(serdes1_prtcl_map & (1 << NONE)))
36 ret = (1 << device) & serdes1_prtcl_map;
41 if (!(serdes2_prtcl_map & (1 << NONE)))
44 return (1 << device) & serdes2_prtcl_map;
47 void fsl_serdes_init(void)
49 immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR;
50 ccsr_gur_t *gur = &immap->im_gur;
51 u32 pordevsr = in_be32(&gur->pordevsr);
52 u32 srds_cfg = (pordevsr & MPC8610_PORDEVSR_IO_SEL) >>
53 MPC8610_PORDEVSR_IO_SEL_SHIFT;
56 if (serdes1_prtcl_map & (1 << NONE) &&
57 serdes2_prtcl_map & (1 << NONE))
60 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
62 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) {
63 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
66 for (lane = 0; lane < SRDS1_MAX_LANES; lane++) {
67 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
68 serdes1_prtcl_map |= (1 << lane_prtcl);
71 /* Set the first bit to indicate serdes has been initialized */
72 serdes1_prtcl_map |= (1 << NONE);
74 if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) {
75 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
79 for (lane = 0; lane < SRDS2_MAX_LANES; lane++) {
80 enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane];
81 serdes2_prtcl_map |= (1 << lane_prtcl);
84 /* Set the first bit to indicate serdes has been initialized */
85 serdes2_prtcl_map |= (1 << NONE);