2 * Copyright 2010 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/immap_86xx.h>
11 #include <asm/fsl_serdes.h>
13 #define SRDS1_MAX_LANES 4
14 #define SRDS2_MAX_LANES 4
16 static u32 serdes1_prtcl_map, serdes2_prtcl_map;
18 static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
19 [0x2] = {PCIE1, PCIE1, PCIE1, PCIE1},
20 [0x3] = {PCIE1, PCIE1, PCIE1, PCIE1},
21 [0x5] = {PCIE1, PCIE1, PCIE1, PCIE1},
22 [0x6] = {PCIE1, PCIE1, PCIE1, PCIE1},
23 [0x7] = {PCIE1, PCIE1, PCIE1, PCIE1},
24 [0xf] = {PCIE1, PCIE1, PCIE1, PCIE1},
27 static u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {
28 [0x3] = {PCIE2, PCIE2, PCIE2, PCIE2},
29 [0x5] = {SRIO1, SRIO1, SRIO1, SRIO1},
30 [0x6] = {SRIO1, SRIO1, SRIO1, SRIO1},
31 [0x7] = {SRIO1, SRIO1, SRIO1, SRIO1},
32 [0x9] = {SRIO1, SRIO1, SRIO1, SRIO1},
33 [0xa] = {SRIO1, SRIO1, SRIO1, SRIO1},
34 [0xb] = {SRIO1, SRIO1, SRIO1, SRIO1},
35 [0xe] = {PCIE2, PCIE2, PCIE2, PCIE2},
36 [0xf] = {PCIE2, PCIE2, PCIE2, PCIE2},
39 int is_serdes_configured(enum srds_prtcl device)
41 int ret = (1 << device) & serdes1_prtcl_map;
46 return (1 << device) & serdes2_prtcl_map;
49 void fsl_serdes_init(void)
51 immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR;
52 ccsr_gur_t *gur = &immap->im_gur;
53 u32 pordevsr = in_be32(&gur->pordevsr);
54 u32 srds_cfg = (pordevsr & MPC8641_PORDEVSR_IO_SEL) >>
55 MPC8641_PORDEVSR_IO_SEL_SHIFT;
58 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
60 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) {
61 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
64 for (lane = 0; lane < SRDS1_MAX_LANES; lane++) {
65 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
66 serdes1_prtcl_map |= (1 << lane_prtcl);
69 if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) {
70 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
74 for (lane = 0; lane < SRDS2_MAX_LANES; lane++) {
75 enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane];
76 serdes2_prtcl_map |= (1 << lane_prtcl);