2 * (C) Copyright 2000-2004
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/processor.h>
13 DECLARE_GLOBAL_DATA_PTR;
15 void get_brgclk(uint sccr)
19 switch ((sccr & SCCR_DFBRG11) >> 11) {
33 gd->arch.brg_clk = gd->cpu_clk / divider;
37 * get_clocks() fills in gd->cpu_clock depending on CONFIG_8xx_GCLK_FREQ
41 uint immr = get_immr(0); /* Return full IMMR contents */
42 immap_t __iomem *immap = (immap_t __iomem *)(immr & 0xFFFF0000);
43 uint sccr = in_be32(&immap->im_clkrst.car_sccr);
45 * If for some reason measuring the gclk frequency won't
46 * work, we return the hardwired value.
47 * (For example, the cogent CMA286-60 CPU module has no
48 * separate oscillator for PITRTCLK)
50 gd->cpu_clk = CONFIG_8xx_GCLK_FREQ;
52 if ((sccr & SCCR_EBDF11) == 0) {
53 /* No Bus Divider active */
54 gd->bus_clk = gd->cpu_clk;
56 /* The MPC8xx has only one BDF: half clock speed */
57 gd->bus_clk = gd->cpu_clk / 2;