3 * Martin Winistoerfer, martinwinistoerfer@gmx.ch.
5 * SPDX-License-Identifier: GPL-2.0+
11 * Discription: MPC555 Internal Memory Map
18 /* System Configuration Registers.
20 typedef struct sys_conf {
41 /* Memory Controller Registers.
43 typedef struct mem_ctlr {
61 /* System Integration Timers.
63 typedef struct sys_int_timers {
84 typedef struct clk_and_reset {
97 #define TBSCR_TBE ((ushort)0x0001)
99 /* System Integration Timer Keys
101 typedef struct sitk {
117 /* Clocks and Reset Keys.
119 typedef struct cark {
126 /* The key to unlock registers maintained by keep-alive power.
128 #define KAPWR_KEY ((unsigned int)0x55ccaa33)
130 /* Flash Configuration
141 typedef struct dprc {
150 /* Time Processor Unit
184 typedef struct qadc {
197 /* command convertion word table */
199 /* result word table, unsigned right justified */
200 ushort qadc_rjurr[64];
201 /* result word table, signed left justified */
202 ushort qadc_ljsrr[64];
203 /* result word table, unsigned left justified */
204 ushort qadc_ljurr[64];
209 typedef struct qsmcm {
212 ushort qsmcm_qdsci_il;
213 ushort qsmcm_qspi_il;
232 ushort qsmcm_qsci1cr;
233 ushort qsmcm_qsci1sr;
234 ushort qsmcm_sctq[16];
235 ushort qsmcm_scrq[16];
237 ushort qsmcm_recram[32];
238 ushort qsmcm_tranram[32];
239 u_char qsmcm_comdram[32];
247 typedef struct mios {
248 ushort mios_mpwmsm0perr; /* mpwmsm0 */
249 ushort mios_mpwmsm0pulr;
250 ushort mios_mpwmsm0cntr;
251 ushort mios_mpwmsm0scr;
252 ushort mios_mpwmsm1perr; /* mpwmsm1 */
253 ushort mios_mpwmsm1pulr;
254 ushort mios_mpwmsm1cntr;
255 ushort mios_mpwmsm1scr;
256 ushort mios_mpwmsm2perr; /* mpwmsm2 */
257 ushort mios_mpwmsm2pulr;
258 ushort mios_mpwmsm2cntr;
259 ushort mios_mpwmsm2scr;
260 ushort mios_mpwmsm3perr; /* mpwmsm3 */
261 ushort mios_mpwmsm3pulr;
262 ushort mios_mpwmsm3cntr;
263 ushort mios_mpwmsm3scr;
265 ushort mios_mmcsm6cnt; /* mmcsm6 */
266 ushort mios_mmcsm6mlr;
267 ushort mios_mmcsm6scrd, mmcsm6scr;
269 ushort mios_mdasm11ar; /* mdasm11 */
270 ushort mios_mdasm11br;
271 ushort mios_mdasm11scrd, mdasm11scr;
272 ushort mios_mdasm12ar; /* mdasm12 */
273 ushort mios_mdasm12br;
274 ushort mios_mdasm12scrd, mdasm12scr;
275 ushort mios_mdasm13ar; /* mdasm13 */
276 ushort mios_mdasm13br;
277 ushort mios_mdasm13scrd, mdasm13scr;
278 ushort mios_mdasm14ar; /* mdasm14 */
279 ushort mios_mdasm14br;
280 ushort mios_mdasm14scrd, mdasm14scr;
281 ushort mios_mdasm15ar; /* mdasm15 */
282 ushort mios_mdasm15br;
283 ushort mios_mdasm15scrd, mdasm15scr;
284 ushort mios_mpwmsm16perr; /* mpwmsm16 */
285 ushort mios_mpwmsm16pulr;
286 ushort mios_mpwmsm16cntr;
287 ushort mios_mpwmsm16scr;
288 ushort mios_mpwmsm17perr; /* mpwmsm17 */
289 ushort mios_mpwmsm17pulr;
290 ushort mios_mpwmsm17cntr;
291 ushort mios_mpwmsm17scr;
292 ushort mios_mpwmsm18perr; /* mpwmsm18 */
293 ushort mios_mpwmsm18pulr;
294 ushort mios_mpwmsm18cntr;
295 ushort mios_mpwmsm18scr;
296 ushort mios_mpwmsm19perr; /* mpwmsm19 */
297 ushort mios_mpwmsm19pulr;
298 ushort mios_mpwmsm19cntr;
299 ushort mios_mpwmsm19scr;
301 ushort mios_mmcsm22cnt; /* mmcsm22 */
302 ushort mios_mmcsm22mlr;
303 ushort mios_mmcsm22scrd, mmcsm22scr;
305 ushort mios_mdasm27ar; /* mdasm27 */
306 ushort mios_mdasm27br;
307 ushort mios_mdasm27scrd, mdasm27scr;
308 ushort mios_mdasm28ar; /*mdasm28 */
309 ushort mios_mdasm28br;
310 ushort mios_mdasm28scrd, mdasm28scr;
311 ushort mios_mdasm29ar; /* mdasm29 */
312 ushort mios_mdasm29br;
313 ushort mios_mdasm29scrd, mdasm29scr;
314 ushort mios_mdasm30ar; /* mdasm30 */
315 ushort mios_mdasm30br;
316 ushort mios_mdasm30scrd, mdasm30scr;
317 ushort mios_mdasm31ar; /* mdasm31 */
318 ushort mios_mdasm31br;
319 ushort mios_mdasm31scrd, mdasm31scr;
320 ushort mios_mpiosm32dr;
321 ushort mios_mpiosm32ddr;
323 ushort mios_mios1tpcr;
325 ushort mios_mios1vnr;
326 ushort mios_mios1mcr;
329 ushort mios_mcpsmscr;
331 ushort mios_mios1sr0;
333 ushort mios_mios1er0;
334 ushort mios_mios1rpr0;
336 ushort mios_mios1lvl0;
338 ushort mios_mios1sr1;
340 ushort mios_mios1er1;
341 ushort mios_mios1rpr1;
343 ushort mios_mios1lvl1;
349 typedef struct tcan {
353 u_char tcan_canctrl0;
354 u_char tcan_canctrl1;
356 u_char tcan_canctrl2;
359 ushort tcan_rxgmskhi;
360 ushort tcan_rxgmsklo;
361 ushort tcan_rx14mskhi;
362 ushort tcan_rx14msklo;
363 ushort tcan_rx15mskhi;
364 ushort tcan_rx15msklo;
384 typedef struct uimb {
393 /* Internal Memory Map MPC555
395 typedef struct immap {
396 char res1[262144]; /* CMF Flash A 256 Kbytes */
397 char res2[196608]; /* CMF Flash B 192 Kbytes */
398 char res3[2670592]; /* Reserved for Flash */
399 sysconf5xx_t im_siu_conf; /* SIU Configuration */
400 memctl5xx_t im_memctl; /* Memory Controller */
401 sit5xx_t im_sit; /* System Integration Timers */
402 car5xx_t im_clkrst; /* Clocks and Reset */
403 sitk5xx_t im_sitk; /* System Integration Timer Keys*/
404 cark8xx_t im_clkrstk; /* Clocks and Resert Keys */
405 fl5xx_t im_fla; /* Flash Module A */
406 fl5xx_t im_flb; /* Flash Module B */
407 char res4[14208]; /* Reserved for SIU */
408 dprc5xx_t im_dprc; /* Dpram Control Register */
409 char res5[8180]; /* Reserved */
410 char dptram[6144]; /* Dptram */
411 char res6[2048]; /* Reserved */
412 tpu5xx_t im_tpua; /* Time Proessing Unit A */
413 tpu5xx_t im_tpub; /* Time Processing Unit B */
414 qadc5xx_t im_qadca; /* QADC A */
415 qadc5xx_t im_qadcb; /* QADC B */
416 qsmcm5xx_t im_qsmcm; /* SCI and SPI */
417 mios5xx_t im_mios; /* MIOS */
418 tcan5xx_t im_tcana; /* Toucan A */
419 tcan5xx_t im_tcanb; /* Toucan B */
420 char res7[1792]; /* Reserved */
421 uimb5xx_t im_uimb; /* UIMB */
424 #endif /* __IMMAP_5XX__ */