2 * Copyright 2009-2011 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/config_mpc85xx.h>
15 #include <asm/config_mpc86xx.h>
18 #ifndef HWCONFIG_BUFFER_SIZE
19 #define HWCONFIG_BUFFER_SIZE 256
22 /* CONFIG_HARD_SPI triggers SPI bus initialization in PowerPC */
23 #if defined(CONFIG_MPC8XXX_SPI) || defined(CONFIG_FSL_ESPI)
24 # ifndef CONFIG_HARD_SPI
25 # define CONFIG_HARD_SPI
30 #define CONFIG_SYS_BOOT_RAMDISK_HIGH
31 #define CONFIG_SYS_BOOT_GET_CMDLINE
32 #define CONFIG_SYS_BOOT_GET_KBD
34 #ifndef CONFIG_MAX_MEM_MAPPED
35 #if defined(CONFIG_4xx) || \
36 defined(CONFIG_E500) || \
37 defined(CONFIG_MPC86xx) || \
39 #define CONFIG_MAX_MEM_MAPPED ((phys_size_t)2 << 30)
41 #define CONFIG_MAX_MEM_MAPPED (256 << 20)
45 /* Check if boards need to enable FSL DMA engine for SDRAM init */
46 #if !defined(CONFIG_FSL_DMA) && defined(CONFIG_DDR_ECC)
47 #if (defined(CONFIG_MPC83xx) && defined(CONFIG_DDR_ECC_INIT_VIA_DMA)) || \
48 ((defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)) && \
49 !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER))
50 #define CONFIG_FSL_DMA
54 #ifndef CONFIG_MAX_CPUS
55 #define CONFIG_MAX_CPUS 1
59 * Provide a default boot page translation virtual address that lines up with
60 * Freescale's default e500 reset page.
62 #if (defined(CONFIG_E500) && defined(CONFIG_MP))
63 #ifndef CONFIG_BPTR_VIRT_ADDR
64 #define CONFIG_BPTR_VIRT_ADDR 0xfffff000
69 * SEC (crypto unit) major compatible version determination
71 #if defined(CONFIG_MPC83xx)
72 #define CONFIG_SYS_FSL_SEC_COMPAT 2
75 /* Since so many PPC SOCs have a semi-common LBC, define this here */
76 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) || \
77 defined(CONFIG_MPC83xx)
78 #if !defined(CONFIG_FSL_IFC)
79 #define CONFIG_FSL_LBC
83 /* The TSEC driver uses the PHYLIB infrastructure */
85 #if defined(CONFIG_TSEC_ENET)
88 #include <config_phylib_all_drivers.h>
89 #endif /* TSEC_ENET */
90 #endif /* !CONFIG_PHYLIB */
92 /* The FMAN driver uses the PHYLIB infrastructure */
93 #if defined(CONFIG_FMAN_ENET)
97 /* All PPC boards must swap IDE bytes */
98 #define CONFIG_IDE_SWAP_IO
100 #endif /* _ASM_CONFIG_H_ */