2 * Copyright 2009-2011 Freescale Semiconductor, Inc.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 #ifndef _ASM_CONFIG_H_
22 #define _ASM_CONFIG_H_
25 #include <asm/config_mpc85xx.h>
29 #include <asm/config_mpc86xx.h>
32 #ifndef HWCONFIG_BUFFER_SIZE
33 #define HWCONFIG_BUFFER_SIZE 256
36 /* CONFIG_HARD_SPI triggers SPI bus initialization in PowerPC */
37 #if defined(CONFIG_MPC8XXX_SPI) || defined(CONFIG_FSL_ESPI)
38 # ifndef CONFIG_HARD_SPI
39 # define CONFIG_HARD_SPI
44 #define CONFIG_SYS_BOOT_RAMDISK_HIGH
45 #define CONFIG_SYS_BOOT_GET_CMDLINE
46 #define CONFIG_SYS_BOOT_GET_KBD
48 #ifndef CONFIG_MAX_MEM_MAPPED
49 #if defined(CONFIG_4xx) || \
50 defined(CONFIG_E500) || \
51 defined(CONFIG_MPC86xx) || \
53 #define CONFIG_MAX_MEM_MAPPED ((phys_size_t)2 << 30)
55 #define CONFIG_MAX_MEM_MAPPED (256 << 20)
59 /* Check if boards need to enable FSL DMA engine for SDRAM init */
60 #if !defined(CONFIG_FSL_DMA) && defined(CONFIG_DDR_ECC)
61 #if (defined(CONFIG_MPC83xx) && defined(CONFIG_DDR_ECC_INIT_VIA_DMA)) || \
62 ((defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)) && \
63 !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER))
64 #define CONFIG_FSL_DMA
68 #ifndef CONFIG_MAX_CPUS
69 #define CONFIG_MAX_CPUS 1
73 * Provide a default boot page translation virtual address that lines up with
74 * Freescale's default e500 reset page.
76 #if (defined(CONFIG_E500) && defined(CONFIG_MP))
77 #ifndef CONFIG_BPTR_VIRT_ADDR
78 #define CONFIG_BPTR_VIRT_ADDR 0xfffff000
83 * SEC (crypto unit) major compatible version determination
85 #if defined(CONFIG_MPC83xx)
86 #define CONFIG_SYS_FSL_SEC_COMPAT 2
89 /* Since so many PPC SOCs have a semi-common LBC, define this here */
90 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) || \
91 defined(CONFIG_MPC83xx)
92 #if !defined(CONFIG_FSL_IFC)
93 #define CONFIG_FSL_LBC
97 /* The TSEC driver uses the PHYLIB infrastructure */
99 #if defined(CONFIG_TSEC_ENET)
100 #define CONFIG_PHYLIB
102 #include <config_phylib_all_drivers.h>
103 #endif /* TSEC_ENET */
104 #endif /* !CONFIG_PHYLIB */
106 /* The FMAN driver uses the PHYLIB infrastructure */
107 #if defined(CONFIG_FMAN_ENET)
108 #define CONFIG_PHYLIB
111 /* All PPC boards must swap IDE bytes */
112 #define CONFIG_IDE_SWAP_IO
114 #endif /* _ASM_CONFIG_H_ */