2 * Copyright 2008-2011 Freescale Semiconductor, Inc.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * Version 2 as published by the Free Software Foundation.
14 #define LAW_EN 0x80000000
16 #define SET_LAW_ENTRY(idx, a, sz, trgt) \
17 { .index = idx, .addr = a, .size = sz, .trgt_id = trgt }
19 #define SET_LAW(a, sz, trgt) \
20 { .index = -1, .addr = a, .size = sz, .trgt_id = trgt }
49 #define law_size_bits(sz) (__ilog2_u64(sz) - 1)
50 #define lawar_size(x) (1ULL << ((x & 0x3f) + 1))
52 #ifdef CONFIG_FSL_CORENET
54 LAW_TRGT_IF_PCIE_1 = 0x00,
55 LAW_TRGT_IF_PCIE_2 = 0x01,
56 LAW_TRGT_IF_PCIE_3 = 0x02,
57 LAW_TRGT_IF_PCIE_4 = 0x03,
58 LAW_TRGT_IF_RIO_1 = 0x08,
59 LAW_TRGT_IF_RIO_2 = 0x09,
61 LAW_TRGT_IF_DDR_1 = 0x10,
62 LAW_TRGT_IF_DDR_2 = 0x11, /* 2nd controller */
63 LAW_TRGT_IF_DDR_3 = 0x12,
64 LAW_TRGT_IF_DDR_4 = 0x13,
65 LAW_TRGT_IF_DDR_INTRLV = 0x14,
66 LAW_TRGT_IF_DDR_INTLV_34 = 0x15,
67 LAW_TRGT_IF_DDR_INTLV_123 = 0x17,
68 LAW_TRGT_IF_DDR_INTLV_1234 = 0x16,
69 LAW_TRGT_IF_BMAN = 0x18,
70 LAW_TRGT_IF_DCSR = 0x1d,
71 LAW_TRGT_IF_LBC = 0x1f,
72 LAW_TRGT_IF_QMAN = 0x3c,
74 #define LAW_TRGT_IF_DDR LAW_TRGT_IF_DDR_1
75 #define LAW_TRGT_IF_IFC LAW_TRGT_IF_LBC
78 LAW_TRGT_IF_PCI = 0x00,
79 LAW_TRGT_IF_PCI_2 = 0x01,
80 #ifndef CONFIG_MPC8641
81 LAW_TRGT_IF_PCIE_1 = 0x02,
83 #if !defined(CONFIG_MPC8572) && !defined(CONFIG_P2020)
84 LAW_TRGT_IF_PCIE_3 = 0x03,
86 LAW_TRGT_IF_LBC = 0x04,
87 LAW_TRGT_IF_CCSR = 0x08,
88 LAW_TRGT_IF_DDR_INTRLV = 0x0b,
89 LAW_TRGT_IF_RIO = 0x0c,
90 LAW_TRGT_IF_RIO_2 = 0x0d,
91 LAW_TRGT_IF_DPAA_SWP_SRAM = 0x0e,
92 LAW_TRGT_IF_DDR = 0x0f,
93 LAW_TRGT_IF_DDR_2 = 0x16, /* 2nd controller */
94 /* place holder for 3-way and 4-way interleaving */
97 LAW_TRGT_IF_DDR_INTLV_34,
98 LAW_TRGT_IF_DDR_INTLV_123,
99 LAW_TRGT_IF_DDR_INTLV_1234,
101 #define LAW_TRGT_IF_DDR_1 LAW_TRGT_IF_DDR
102 #define LAW_TRGT_IF_PCI_1 LAW_TRGT_IF_PCI
103 #define LAW_TRGT_IF_PCIX LAW_TRGT_IF_PCI
104 #define LAW_TRGT_IF_PCIE_2 LAW_TRGT_IF_PCI_2
105 #define LAW_TRGT_IF_RIO_1 LAW_TRGT_IF_RIO
106 #define LAW_TRGT_IF_IFC LAW_TRGT_IF_LBC
108 #ifdef CONFIG_MPC8641
109 #define LAW_TRGT_IF_PCIE_1 LAW_TRGT_IF_PCI
112 #if defined(CONFIG_MPC8572) || defined(CONFIG_P2020)
113 #define LAW_TRGT_IF_PCIE_3 LAW_TRGT_IF_PCI
115 #endif /* CONFIG_FSL_CORENET */
121 enum law_trgt_if trgt_id;
124 extern void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id);
125 extern int set_next_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id);
126 extern int set_last_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id);
127 extern int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id);
128 extern struct law_entry find_law(phys_addr_t addr);
129 extern void disable_law(u8 idx);
130 extern void init_laws(void);
131 extern void print_laws(void);
133 /* define in board code */
134 extern struct law_entry law_table[];
135 extern int num_law_entries;