2 * Copyright 2010-2011 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
7 #ifndef __FSL_SECURE_BOOT_H
8 #define __FSL_SECURE_BOOT_H
9 #include <asm/config_mpc85xx.h>
11 #ifdef CONFIG_SECURE_BOOT
13 #ifndef CONFIG_FIT_SIGNATURE
14 #define CONFIG_CHAIN_OF_TRUST
17 #if defined(CONFIG_FSL_CORENET)
18 #define CONFIG_SYS_PBI_FLASH_BASE 0xc0000000
19 #elif defined(CONFIG_BSC9132QDS)
20 #define CONFIG_SYS_PBI_FLASH_BASE 0xc8000000
21 #elif defined(CONFIG_C29XPCIE)
22 #define CONFIG_SYS_PBI_FLASH_BASE 0xcc000000
24 #define CONFIG_SYS_PBI_FLASH_BASE 0xce000000
26 #define CONFIG_SYS_PBI_FLASH_WINDOW 0xcff80000
28 #if defined(CONFIG_B4860QDS) || \
29 defined(CONFIG_T4240QDS) || \
30 defined(CONFIG_T2080QDS) || \
31 defined(CONFIG_T2080RDB) || \
32 defined(CONFIG_T1040QDS) || \
33 defined(CONFIG_T104xD4QDS) || \
34 defined(CONFIG_T104xRDB) || \
35 defined(CONFIG_T104xD4RDB) || \
36 defined(CONFIG_PPC_T1023) || \
37 defined(CONFIG_PPC_T1024)
38 #ifndef CONFIG_SYS_RAMBOOT
39 #define CONFIG_SYS_CPC_REINIT_F
41 #define CONFIG_KEY_REVOCATION
42 #undef CONFIG_SYS_INIT_L3_ADDR
43 #define CONFIG_SYS_INIT_L3_ADDR 0xbff00000
46 #if defined(CONFIG_RAMBOOT_PBL)
47 #undef CONFIG_SYS_INIT_L3_ADDR
48 #ifdef CONFIG_SYS_INIT_L3_VADDR
49 #define CONFIG_SYS_INIT_L3_ADDR \
50 (CONFIG_SYS_INIT_L3_VADDR & ~0xFFF00000) | \
53 #define CONFIG_SYS_INIT_L3_ADDR 0xbff00000
57 #if defined(CONFIG_C29XPCIE)
58 #define CONFIG_KEY_REVOCATION
61 #if defined(CONFIG_PPC_P3041) || \
62 defined(CONFIG_PPC_P4080) || \
63 defined(CONFIG_PPC_P5020) || \
64 defined(CONFIG_PPC_P5040) || \
65 defined(CONFIG_PPC_P2041)
66 #define CONFIG_FSL_TRUST_ARCH_v1
69 #if defined(CONFIG_FSL_CORENET) && !defined(CONFIG_SYS_RAMBOOT)
70 /* The key used for verification of next level images
71 * is picked up from an Extension Table which has
72 * been verified by the ISBC (Internal Secure boot Code)
73 * in boot ROM of the SoC.
74 * The feature is only applicable in case of NOR boot and is
75 * not applicable in case of RAMBOOT (NAND, SD, SPI).
77 #define CONFIG_FSL_ISBC_KEY_EXT
79 #endif /* #ifdef CONFIG_SECURE_BOOT */
81 #ifdef CONFIG_CHAIN_OF_TRUST
83 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
85 #ifdef CONFIG_SPL_BUILD
87 * PPAACT and SPAACT table for PAMU must be placed on DDR after DDR init
88 * due to space crunch on CPC and thus malloc will not work.
90 #define CONFIG_SPL_PPAACT_ADDR 0x2e000000
91 #define CONFIG_SPL_SPAACT_ADDR 0x2f000000
92 #define CONFIG_SPL_JR0_LIODN_S 454
93 #define CONFIG_SPL_JR0_LIODN_NS 458
95 * Define the key hash for U-Boot here if public/private key pair used to
96 * sign U-boot are different from the SRK hash put in the fuse
97 * Example of defining KEY_HASH is
98 * #define CONFIG_SPL_UBOOT_KEY_HASH \
99 * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b"
100 * else leave it defined as NULL
103 #define CONFIG_SPL_UBOOT_KEY_HASH NULL
104 #endif /* ifdef CONFIG_SPL_BUILD */
106 #define CONFIG_CMD_ESBC_VALIDATE
107 #define CONFIG_CMD_BLOB
108 #define CONFIG_FSL_SEC_MON
109 #define CONFIG_SHA_PROG_HW_ACCEL
110 #define CONFIG_RSA_FREESCALE_EXP
112 #ifndef CONFIG_FSL_CAAM
113 #define CONFIG_FSL_CAAM
116 #ifndef CONFIG_SPL_BUILD
118 * fsl_setenv_chain_of_trust() must be called from
121 #ifndef CONFIG_BOARD_LATE_INIT
122 #define CONFIG_BOARD_LATE_INIT
125 /* If Boot Script is not on NOR and is required to be copied on RAM */
126 #ifdef CONFIG_BOOTSCRIPT_COPY_RAM
127 #define CONFIG_BS_HDR_ADDR_RAM 0x00010000
128 #define CONFIG_BS_HDR_ADDR_DEVICE 0x00800000
129 #define CONFIG_BS_HDR_SIZE 0x00002000
130 #define CONFIG_BS_ADDR_RAM 0x00012000
131 #define CONFIG_BS_ADDR_DEVICE 0x00802000
132 #define CONFIG_BS_SIZE 0x00001000
134 #define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM
137 /* The bootscript header address is different for B4860 because the NOR
138 * mapping is different on B4 due to reduced NOR size.
140 #if defined(CONFIG_B4860QDS)
141 #define CONFIG_BOOTSCRIPT_HDR_ADDR 0xecc00000
142 #elif defined(CONFIG_FSL_CORENET)
143 #define CONFIG_BOOTSCRIPT_HDR_ADDR 0xe8e00000
144 #elif defined(CONFIG_BSC9132QDS)
145 #define CONFIG_BOOTSCRIPT_HDR_ADDR 0x88020000
146 #elif defined(CONFIG_C29XPCIE)
147 #define CONFIG_BOOTSCRIPT_HDR_ADDR 0xec020000
149 #define CONFIG_BOOTSCRIPT_HDR_ADDR 0xee020000
152 #endif /* #ifdef CONFIG_BOOTSCRIPT_COPY_RAM */
154 #include <config_fsl_chain_trust.h>
155 #endif /* #ifndef CONFIG_SPL_BUILD */
156 #endif /* #ifdef CONFIG_CHAIN_OF_TRUST */