2 * (C) Copyright 2008 Renesas Solutions Corp.
4 * SH7723 Internal I/O register
6 * SPDX-License-Identifier: GPL-2.0+
9 #ifndef _ASM_CPU_SH7723_H_
10 #define _ASM_CPU_SH7723_H_
12 #define CACHE_OC_NUM_WAYS 4
13 #define CCR_CACHE_INIT 0x0000090d
16 #define TRA 0xFF000020
17 #define EXPEVT 0xFF000024
18 #define INTEVT 0xFF000028
21 #define PTEH 0xFF000000
22 #define PTEL 0xFF000004
23 #define TTB 0xFF000008
24 #define TEA 0xFF00000C
25 #define MMUCR 0xFF000010
26 #define PASCR 0xFF000070
27 #define IRMCR 0xFF000078
30 #define CCR 0xFF00001C
31 #define RAMCR 0xFF000074
36 #define CMNCR 0xFEC10000
37 #define CS0BCR 0xFEC10004
38 #define CS2BCR 0xFEC10008
39 #define CS4BCR 0xFEC10010
40 #define CS5ABCR 0xFEC10014
41 #define CS5BBCR 0xFEC10018
42 #define CS6ABCR 0xFEC1001C
43 #define CS6BBCR 0xFEC10020
44 #define CS0WCR 0xFEC10024
45 #define CS2WCR 0xFEC10028
46 #define CS4WCR 0xFEC10030
47 #define CS5AWCR 0xFEC10034
48 #define CS5BWCR 0xFEC10038
49 #define CS6AWCR 0xFEC1003C
50 #define CS6BWCR 0xFEC10040
51 #define RBWTCNT 0xFEC10054
54 #define SBSC_SDCR 0xFE400008
55 #define SBSC_SDWCR 0xFE40000C
56 #define SBSC_SDPCR 0xFE400010
57 #define SBSC_RTCSR 0xFE400014
58 #define SBSC_RTCNT 0xFE400018
59 #define SBSC_RTCOR 0xFE40001C
60 #define SBSC_RFCR 0xFE400020
65 #define FRQCR 0xA4150000
66 #define VCLKCR 0xA4150004
67 #define SCLKACR 0xA4150008
68 #define SCLKBCR 0xA415000C
69 #define IRDACLKCR 0xA4150018
70 #define PLLCR 0xA4150024
71 #define DLLFRQ 0xA4150050
74 #define STBCR 0xA4150020
75 #define MSTPCR0 0xA4150030
76 #define MSTPCR1 0xA4150034
77 #define MSTPCR2 0xA4150038
80 #define RWTCNT 0xA4520000
81 #define RWTCSR 0xA4520004
85 #define TMU_BASE 0xFFD80000
90 #define CMSTR 0xA44A0000
91 #define CMCSR 0xA44A0060
92 #define CMCNT 0xA44A0064
93 #define CMCOR 0xA44A0068
98 #define SCIF0_BASE 0xFFE00000
99 #define SCIF1_BASE 0xFFE10000
100 #define SCIF2_BASE 0xFFE20000
101 #define SCIF3_BASE 0xa4e30000
102 #define SCIF4_BASE 0xa4e40000
103 #define SCIF5_BASE 0xa4e50000
123 #define PACR 0xA4050100
124 #define PBCR 0xA4050102
125 #define PCCR 0xA4050104
126 #define PDCR 0xA4050106
127 #define PECR 0xA4050108
128 #define PFCR 0xA405010A
129 #define PGCR 0xA405010C
130 #define PHCR 0xA405010E
131 #define PJCR 0xA4050110
132 #define PKCR 0xA4050112
133 #define PLCR 0xA4050114
134 #define PMCR 0xA4050116
135 #define PNCR 0xA4050118
136 #define PQCR 0xA405011A
137 #define PRCR 0xA405011C
138 #define PSCR 0xA405011E
139 #define PTCR 0xA4050140
140 #define PUCR 0xA4050142
141 #define PVCR 0xA4050144
142 #define PWCR 0xA4050146
143 #define PXCR 0xA4050148
144 #define PYCR 0xA405014A
145 #define PZCR 0xA405014C
146 #define PSELA 0xA405014E
147 #define PSELB 0xA4050150
148 #define PSELC 0xA4050152
149 #define PSELD 0xA4050154
150 #define HIZCRA 0xA4050158
151 #define HIZCRB 0xA405015A
152 #define HIZCRC 0xA405015C
153 #define HIZCRD 0xA405015E
154 #define MSELCRA 0xA4050180
155 #define MSELCRB 0xA4050182
156 #define PULCR 0xA4050184
157 #define DRVCRA 0xA405018A
158 #define DRVCRB 0xA405018C
161 #define PADR 0xA4050120
162 #define PBDR 0xA4050122
163 #define PCDR 0xA4050124
164 #define PDDR 0xA4050126
165 #define PEDR 0xA4050128
166 #define PFDR 0xA405012A
167 #define PGDR 0xA405012C
168 #define PHDR 0xA405012E
169 #define PJDR 0xA4050130
170 #define PKDR 0xA4050132
171 #define PLDR 0xA4050134
172 #define PMDR 0xA4050136
173 #define PNDR 0xA4050138
174 #define PQDR 0xA405013A
175 #define PRDR 0xA405013C
176 #define PSDR 0xA405013E
177 #define PTDR 0xA4050160
178 #define PUDR 0xA4050162
179 #define PVDR 0xA4050164
180 #define PWDR 0xA4050166
181 #define PYDR 0xA4050168
182 #define PZDR 0xA405016A
187 #endif /* _ASM_CPU_SH7723_H_ */