2 * Copyright (C) 2012 Renesas Solutions Corp.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 #ifndef _ASM_CPU_SH7752_H_
22 #define _ASM_CPU_SH7752_H_
24 #define CCR 0xFF00001C
25 #define WTCNT 0xFFCC0000
26 #define CCR_CACHE_INIT 0x0000090b
27 #define CACHE_OC_NUM_WAYS 1
29 #ifndef __ASSEMBLY__ /* put C only stuff in this section */
32 unsigned int reserved[4];
35 #define MMU_BASE ((struct mmu_regs *)0xff000000)
38 #define WTCSR0 0xffcc0002
39 #define WRSTCSR_R 0xffcc0003
40 #define WRSTCSR_W 0xffcc0002
41 #define WTCSR_PREFIX 0xa500
42 #define WRSTCSR_PREFIX 0x6900
43 #define WRSTCSR_WOVF_PREFIX 0x9600
46 #define SCIF0_BASE 0xfe4b0000 /* The real name is SCIF2 */
47 #define SCIF1_BASE 0xfe4c0000 /* The real name is SCIF3 */
48 #define SCIF2_BASE 0xfe4d0000 /* The real name is SCIF4 */
51 #define TMU_BASE 0xFE430000
53 /* ETHER, GETHER MAC address */
54 struct ether_mac_regs {
55 unsigned int reserved[114];
57 unsigned int reserved2;
60 #define GETHER0_MAC_BASE ((struct ether_mac_regs *)0xfee0400)
61 #define GETHER1_MAC_BASE ((struct ether_mac_regs *)0xfee0c00)
62 #define ETHER0_MAC_BASE ((struct ether_mac_regs *)0xfef0000)
63 #define ETHER1_MAC_BASE ((struct ether_mac_regs *)0xfef0800)
66 struct gether_control_regs {
69 #define GETHER_CONTROL_BASE ((struct gether_control_regs *)0xffc10100)
70 #define GBECONT_RMII1 0x00020000
71 #define GBECONT_RMII0 0x00010000
82 #define SERMUX_BASE ((struct sermux_regs *)0xfe470000)
86 struct usb_common_regs {
87 unsigned short reserved[129];
88 unsigned short suspmode;
90 #define USB0_COMMON_BASE ((struct usb_common_regs *)0xfe450000)
91 #define USB1_COMMON_BASE ((struct usb_common_regs *)0xfe4f0000)
93 struct usb0_phy_regs {
95 unsigned short reserved[4];
96 unsigned short portsel;
98 #define USB0_PHY_BASE ((struct usb0_phy_regs *)0xfe5f0000)
100 struct usb1_port_regs {
101 unsigned int port1sel;
102 unsigned int reserved;
103 unsigned int usb1intsts;
105 #define USB1_PORT_BASE ((struct usb1_port_regs *)0xfe4f2000)
107 struct usb1_alignment_regs {
108 unsigned int ehcidatac; /* 0xfe4fe018 */
109 unsigned int reserved[63];
110 unsigned int ohcidatac;
112 #define USB1_ALIGNMENT_BASE ((struct usb1_alignment_regs *)0xfe4fe018)
131 unsigned short reserved;
143 unsigned char reserved_a;
145 unsigned char reserved_b;
147 unsigned char reserved_c;
149 unsigned char reserved_d;
151 unsigned char reserved_e;
153 unsigned char reserved_f;
155 unsigned char reserved_g;
157 unsigned char reserved_h;
159 unsigned char reserved_i;
161 unsigned char reserved_j;
163 unsigned char reserved_k;
165 unsigned char reserved_l;
167 unsigned char reserved_m;
169 unsigned char reserved_n;
171 unsigned char reserved_o;
173 unsigned char reserved_p;
175 unsigned char reserved_q;
177 unsigned char reserved_r;
179 unsigned char reserved_s;
181 unsigned char reserved_t;
183 unsigned char reserved_u;
185 unsigned char reserved_v;
187 unsigned char reserved_w;
189 unsigned char reserved_x;
191 unsigned char reserved_y;
193 unsigned char reserved_z;
195 unsigned short ncmcr;
196 unsigned short nccsr;
197 unsigned char reserved2[2];
198 unsigned short psel0; /* +0x70 */
199 unsigned short psel1;
200 unsigned short psel2;
201 unsigned short psel3;
202 unsigned short psel4;
203 unsigned short psel5;
204 unsigned short psel6;
205 unsigned short reserved3[2];
206 unsigned short psel7;
208 #define GPIO_BASE ((struct gpio_regs *)0xffec0000)
210 #endif /* ifndef __ASSEMBLY__ */
211 #endif /* _ASM_CPU_SH7752_H_ */