2 * Copyright (C) 2007,2008 Nobobuhiro Iwamatsu <iwamatsu@nigauri.org>
3 * Copyright (C) 2008 Renesas Solutions Corp.
6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 * SPDX-License-Identifier: GPL-2.0+
13 #include <asm/processor.h>
15 #define CMT_CMCSR_INIT 0x0001 /* PCLK/32 */
16 #define CMT_CMCSR_CALIB 0x0000
17 #define CMT_MAX_COUNTER (0xFFFFFFFF)
18 #define CMT_TIMER_RESET (0xFFFF)
20 static vu_long cmt0_timer;
22 static void cmt_timer_start(unsigned int timer)
24 writew(readw(CMSTR) | 0x01, CMSTR);
27 static void cmt_timer_stop(unsigned int timer)
29 writew(readw(CMSTR) & ~0x01, CMSTR);
35 /* Divide clock by 32 */
37 writew(CMT_CMCSR_INIT, CMCSR_0);
39 /* User Device 0 only */
41 writew(CMT_TIMER_RESET, CMCOR_0);
47 unsigned long long get_ticks(void)
52 static vu_long cmcnt = 0;
53 static unsigned long get_usec (void)
55 ulong data = readw(CMCNT_0);
60 cmcnt = (CMT_TIMER_RESET - cmcnt) + data;
62 if ((cmt0_timer + cmcnt) > CMT_MAX_COUNTER)
63 cmt0_timer = ((cmt0_timer + cmcnt) - CMT_MAX_COUNTER);
72 ulong get_timer(ulong base)
74 return (get_usec() / 1000) - base;
77 void __udelay(unsigned long usec)
79 unsigned long end = get_usec() + usec;
81 while (get_usec() < end)
85 unsigned long get_tbclk(void)
87 return CONFIG_SH_CMT_CLK_FREQ;