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x86: coreboot: Fix cosmetic issues
[u-boot] / arch / x86 / cpu / coreboot / pci.c
1 /*
2  * Copyright (c) 2011 The Chromium OS Authors.
3  * (C) Copyright 2008,2009
4  * Graeme Russ, <graeme.russ@gmail.com>
5  *
6  * (C) Copyright 2002
7  * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
8  *
9  * SPDX-License-Identifier:     GPL-2.0+
10  */
11
12 #include <common.h>
13 #include <dm.h>
14 #include <errno.h>
15 #include <pci.h>
16 #include <asm/io.h>
17 #include <asm/pci.h>
18
19 DECLARE_GLOBAL_DATA_PTR;
20
21 static const struct dm_pci_ops pci_x86_ops = {
22         .read_config    = pci_x86_read_config,
23         .write_config   = pci_x86_write_config,
24 };
25
26 static const struct udevice_id pci_x86_ids[] = {
27         { .compatible = "pci-x86" },
28         { }
29 };
30
31 U_BOOT_DRIVER(pci_x86_drv) = {
32         .name           = "pci_x86",
33         .id             = UCLASS_PCI,
34         .of_match       = pci_x86_ids,
35         .ops            = &pci_x86_ops,
36 };
37
38 static const struct udevice_id generic_pch_ids[] = {
39         { .compatible = "intel,pch" },
40         { }
41 };
42
43 U_BOOT_DRIVER(generic_pch_drv) = {
44         .name           = "pch",
45         .id             = UCLASS_PCH,
46         .of_match       = generic_pch_ids,
47 };