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x86: chromebook_link: Implement CAR support (cache as RAM)
[u-boot] / arch / x86 / cpu / ivybridge / cpu.c
1 /*
2  * Copyright (c) 2014 Google, Inc
3  * (C) Copyright 2008
4  * Graeme Russ, graeme.russ@gmail.com.
5  *
6  * Some portions from coreboot src/mainboard/google/link/romstage.c
7  * Copyright (C) 2007-2010 coresystems GmbH
8  * Copyright (C) 2011 Google Inc.
9  *
10  * SPDX-License-Identifier:     GPL-2.0
11  */
12
13 #include <common.h>
14 #include <asm/cpu.h>
15 #include <asm/post.h>
16 #include <asm/processor.h>
17
18 DECLARE_GLOBAL_DATA_PTR;
19
20 int arch_cpu_init(void)
21 {
22         int ret;
23
24         post_code(POST_CPU_INIT);
25         timer_set_base(rdtsc());
26
27         ret = x86_cpu_init_f();
28         if (ret)
29                 return ret;
30
31         return 0;
32 }
33
34 int print_cpuinfo(void)
35 {
36         char processor_name[CPU_MAX_NAME_LEN];
37         const char *name;
38
39         /* Print processor name */
40         name = cpu_get_name(processor_name);
41         printf("CPU:   %s\n", name);
42
43         return 0;
44 }