2 * Copyright (c) 2014 Google, Inc
3 * Copyright (C) 2000 Ronald G. Minnich
5 * Microcode update for Intel PIII and later CPUs
7 * SPDX-License-Identifier: GPL-2.0
16 #include <asm/processor.h>
19 * struct microcode_update - standard microcode header from Intel
21 * We read this information out of the device tree and use it to determine
22 * whether the update is applicable or not. We also use the same structure
23 * to read information from the CPU.
25 struct microcode_update {
29 uint processor_signature;
37 static int microcode_decode_node(const void *blob, int node,
38 struct microcode_update *update)
40 update->data = fdt_getprop(blob, node, "data", &update->size);
46 update->header_version = fdtdec_get_int(blob, node,
47 "intel,header-version", 0);
48 update->update_revision = fdtdec_get_int(blob, node,
49 "intel,update-revision", 0);
50 update->date_code = fdtdec_get_int(blob, node,
51 "intel,date-code", 0);
52 update->processor_signature = fdtdec_get_int(blob, node,
53 "intel,processor-signature", 0);
54 update->checksum = fdtdec_get_int(blob, node, "intel,checksum", 0);
55 update->loader_revision = fdtdec_get_int(blob, node,
56 "intel,loader-revision", 0);
57 update->processor_flags = fdtdec_get_int(blob, node,
58 "intel,processor-flags", 0);
63 static inline uint32_t microcode_read_rev(void)
66 * Some Intel CPUs can be very finicky about the CPUID sequence used.
67 * So this is implemented in assembly so that it works reliably.
81 "=a" (low), "=d" (high)
90 static void microcode_read_cpu(struct microcode_update *cpu)
92 /* CPUID sets MSR 0x8B iff a microcode update has been loaded. */
93 unsigned int x86_model, x86_family;
94 struct cpuid_result result;
99 rdmsr(0x8b, low, cpu->update_revision);
100 x86_model = (result.eax >> 4) & 0x0f;
101 x86_family = (result.eax >> 8) & 0x0f;
102 cpu->processor_signature = result.eax;
104 cpu->processor_flags = 0;
105 if ((x86_model >= 5) || (x86_family > 6)) {
106 rdmsr(0x17, low, high);
107 cpu->processor_flags = 1 << ((high >> 18) & 7);
109 debug("microcode: sig=%#x pf=%#x revision=%#x\n",
110 cpu->processor_signature, cpu->processor_flags,
111 cpu->update_revision);
114 /* Get a microcode update from the device tree and apply it */
115 int microcode_update_intel(void)
117 struct microcode_update cpu, update;
118 const void *blob = gd->fdt_blob;
124 microcode_read_cpu(&cpu);
129 node = fdtdec_next_compatible(blob, node,
130 COMPAT_INTEL_MICROCODE);
132 debug("%s: Found %d updates\n", __func__, count);
133 return count ? 0 : skipped ? -EEXIST : -ENOENT;
136 ret = microcode_decode_node(blob, node, &update);
138 debug("%s: Unable to decode update: %d\n", __func__,
142 if (!(update.processor_signature == cpu.processor_signature &&
143 (update.processor_flags & cpu.processor_flags))) {
144 debug("%s: Skipping non-matching update, sig=%x, pf=%x\n",
145 __func__, update.processor_signature,
146 update.processor_flags);
150 ret = microcode_read_rev();
151 wrmsr(0x79, (ulong)update.data, 0);
152 debug("microcode: updated to revision 0x%x date=%04x-%02x-%02x\n",
153 microcode_read_rev(), update.date_code & 0xffff,
154 (update.date_code >> 24) & 0xff,
155 (update.date_code >> 16) & 0xff);