git.sur5r.net Git - u-boot/blob - arch/x86/cpu/qemu/e820.c

   1 /*
   2  * (C) Copyright 2015 Miao Yan <yanmiaobest@gmail.com>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <asm/e820.h>
   9
  10 unsigned install_e820_map(unsigned max_entries, struct e820entry *entries)
  11 {
  12         entries[0].addr = 0;
  13         entries[0].size = ISA_START_ADDRESS;
  14         entries[0].type = E820_RAM;
  15
  16         entries[1].addr = ISA_START_ADDRESS;
  17         entries[1].size = ISA_END_ADDRESS - ISA_START_ADDRESS;
  18         entries[1].type = E820_RESERVED;
  19
  20         /*
  21          * since we use memalign(malloc) to allocate high memory for
  22          * storing ACPI tables, we need to reserve them in e820 tables,
  23          * otherwise kernel will reclaim them and data will be corrupted
  24          */
  25         entries[2].addr = ISA_END_ADDRESS;
  26         entries[2].size = gd->relocaddr - TOTAL_MALLOC_LEN - ISA_END_ADDRESS;
  27         entries[2].type = E820_RAM;
  28
  29         /* for simplicity, reserve entire malloc space */
  30         entries[3].addr = gd->relocaddr - TOTAL_MALLOC_LEN;
  31         entries[3].size = TOTAL_MALLOC_LEN;
  32         entries[3].type = E820_RESERVED;
  33
  34         entries[4].addr = gd->relocaddr;
  35         entries[4].size = gd->ram_size - gd->relocaddr;
  36         entries[4].type = E820_RESERVED;
  37
  38         entries[5].addr = CONFIG_PCIE_ECAM_BASE;
  39         entries[5].size = CONFIG_PCIE_ECAM_SIZE;
  40         entries[5].type = E820_RESERVED;
  41
  42         return 6;
  43 }