2 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
4 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/arch/mrc.h>
12 #include <asm/arch/quark.h>
14 DECLARE_GLOBAL_DATA_PTR;
16 static int mrc_configure_params(struct mrc_params *mrc_params)
18 const void *blob = gd->fdt_blob;
22 node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_QRK_MRC);
24 debug("%s: Cannot find MRC node\n", __func__);
31 * We need support fast boot (MRC cache) in the future.
33 * Set boot mode to cold boot for now
35 mrc_params->boot_mode = BM_COLD;
40 * We need determine ECC by pin strap state
42 * Disable ECC by default for now
44 mrc_params->ecc_enables = 0;
46 mrc_flags = fdtdec_get_int(blob, node, "flags", 0);
47 if (mrc_flags & MRC_FLAG_SCRAMBLE_EN)
48 mrc_params->scrambling_enables = 1;
50 mrc_params->scrambling_enables = 0;
52 mrc_params->dram_width = fdtdec_get_int(blob, node, "dram-width", 0);
53 mrc_params->ddr_speed = fdtdec_get_int(blob, node, "dram-speed", 0);
54 mrc_params->ddr_type = fdtdec_get_int(blob, node, "dram-type", 0);
56 mrc_params->rank_enables = fdtdec_get_int(blob, node, "rank-mask", 0);
57 mrc_params->channel_enables = fdtdec_get_int(blob, node,
59 mrc_params->channel_width = fdtdec_get_int(blob, node,
61 mrc_params->address_mode = fdtdec_get_int(blob, node, "addr-mode", 0);
63 mrc_params->refresh_rate = fdtdec_get_int(blob, node,
65 mrc_params->sr_temp_range = fdtdec_get_int(blob, node,
67 mrc_params->ron_value = fdtdec_get_int(blob, node,
69 mrc_params->rtt_nom_value = fdtdec_get_int(blob, node,
71 mrc_params->rd_odt_value = fdtdec_get_int(blob, node,
74 mrc_params->params.density = fdtdec_get_int(blob, node,
76 mrc_params->params.cl = fdtdec_get_int(blob, node, "dram-cl", 0);
77 mrc_params->params.ras = fdtdec_get_int(blob, node, "dram-ras", 0);
78 mrc_params->params.wtr = fdtdec_get_int(blob, node, "dram-wtr", 0);
79 mrc_params->params.rrd = fdtdec_get_int(blob, node, "dram-rrd", 0);
80 mrc_params->params.faw = fdtdec_get_int(blob, node, "dram-faw", 0);
82 debug("MRC dram_width %d\n", mrc_params->dram_width);
83 debug("MRC rank_enables %d\n", mrc_params->rank_enables);
84 debug("MRC ddr_speed %d\n", mrc_params->ddr_speed);
85 debug("MRC flags: %s\n",
86 (mrc_params->scrambling_enables) ? "SCRAMBLE_EN" : "");
88 debug("MRC density=%d tCL=%d tRAS=%d tWTR=%d tRRD=%d tFAW=%d\n",
89 mrc_params->params.density, mrc_params->params.cl,
90 mrc_params->params.ras, mrc_params->params.wtr,
91 mrc_params->params.rrd, mrc_params->params.faw);
98 struct mrc_params mrc_params;
101 memset(&mrc_params, 0, sizeof(struct mrc_params));
102 ret = mrc_configure_params(&mrc_params);
106 /* Set up the DRAM by calling the memory reference code */
107 mrc_init(&mrc_params);
108 if (mrc_params.status)
111 gd->ram_size = mrc_params.mem_size;
112 post_code(POST_DRAM);
117 void dram_init_banksize(void)
119 gd->bd->bi_dram[0].start = 0;
120 gd->bd->bi_dram[0].size = gd->ram_size;
124 * This function looks for the highest region of memory lower than 4GB which
125 * has enough space for U-Boot where U-Boot is aligned on a page boundary.
126 * It overrides the default implementation found elsewhere which simply
127 * picks the end of ram, wherever that may be. The location of the stack,
128 * the relocation address, and how far U-Boot is moved by relocation are
129 * set in the global data structure.
131 ulong board_get_usable_ram_top(ulong total_size)