2 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
4 * SPDX-License-Identifier: GPL-2.0+
9 #include <dt-bindings/gpio/x86-gpio.h>
10 #include <dt-bindings/interrupt-router/intel-irq.h>
12 /include/ "skeleton.dtsi"
13 /include/ "serial.dtsi"
17 model = "Intel Bayley Bay";
18 compatible = "intel,bayleybay", "intel,baytrail";
30 stdout-path = "/serial";
39 compatible = "intel,baytrail-cpu";
46 compatible = "intel,baytrail-cpu";
53 compatible = "intel,baytrail-cpu";
60 compatible = "intel,baytrail-cpu";
69 compatible = "intel,ich-spi";
72 compatible = "winbond,w25q64dw", "spi-flash";
73 memory-map = <0xff800000 0x00800000>;
78 compatible = "intel,ich6-gpio";
85 compatible = "intel,ich6-gpio";
92 compatible = "intel,ich6-gpio";
99 compatible = "intel,ich6-gpio";
106 compatible = "intel,ich6-gpio";
113 compatible = "intel,ich6-gpio";
120 compatible = "pci-x86";
121 #address-cells = <3>;
124 ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000
125 0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000
126 0x01000000 0x0 0x2000 0x2000 0 0xe000>;
129 reg = <0x0000f800 0 0 0 0>;
130 compatible = "intel,irq-router";
131 intel,pirq-config = "ibase";
132 intel,ibase-offset = <0x50>;
133 intel,pirq-link = <8 8>;
134 intel,pirq-mask = <0xdee0>;
135 intel,pirq-routing = <
136 /* BayTrail PCI devices */
137 PCI_BDF(0, 2, 0) INTA PIRQA
138 PCI_BDF(0, 3, 0) INTA PIRQA
139 PCI_BDF(0, 16, 0) INTA PIRQA
140 PCI_BDF(0, 17, 0) INTA PIRQA
141 PCI_BDF(0, 18, 0) INTA PIRQA
142 PCI_BDF(0, 19, 0) INTA PIRQA
143 PCI_BDF(0, 20, 0) INTA PIRQA
144 PCI_BDF(0, 21, 0) INTA PIRQA
145 PCI_BDF(0, 22, 0) INTA PIRQA
146 PCI_BDF(0, 23, 0) INTA PIRQA
147 PCI_BDF(0, 24, 0) INTA PIRQA
148 PCI_BDF(0, 24, 1) INTC PIRQC
149 PCI_BDF(0, 24, 2) INTD PIRQD
150 PCI_BDF(0, 24, 3) INTB PIRQB
151 PCI_BDF(0, 24, 4) INTA PIRQA
152 PCI_BDF(0, 24, 5) INTC PIRQC
153 PCI_BDF(0, 24, 6) INTD PIRQD
154 PCI_BDF(0, 24, 7) INTB PIRQB
155 PCI_BDF(0, 26, 0) INTA PIRQA
156 PCI_BDF(0, 27, 0) INTA PIRQA
157 PCI_BDF(0, 28, 0) INTA PIRQA
158 PCI_BDF(0, 28, 1) INTB PIRQB
159 PCI_BDF(0, 28, 2) INTC PIRQC
160 PCI_BDF(0, 28, 3) INTD PIRQD
161 PCI_BDF(0, 29, 0) INTA PIRQA
162 PCI_BDF(0, 30, 0) INTA PIRQA
163 PCI_BDF(0, 30, 1) INTD PIRQD
164 PCI_BDF(0, 30, 2) INTB PIRQB
165 PCI_BDF(0, 30, 3) INTC PIRQC
166 PCI_BDF(0, 30, 4) INTD PIRQD
167 PCI_BDF(0, 30, 5) INTB PIRQB
168 PCI_BDF(0, 31, 3) INTB PIRQB
170 /* PCIe root ports downstream interrupts */
171 PCI_BDF(1, 0, 0) INTA PIRQA
172 PCI_BDF(1, 0, 0) INTB PIRQB
173 PCI_BDF(1, 0, 0) INTC PIRQC
174 PCI_BDF(1, 0, 0) INTD PIRQD
175 PCI_BDF(2, 0, 0) INTA PIRQB
176 PCI_BDF(2, 0, 0) INTB PIRQC
177 PCI_BDF(2, 0, 0) INTC PIRQD
178 PCI_BDF(2, 0, 0) INTD PIRQA
179 PCI_BDF(3, 0, 0) INTA PIRQC
180 PCI_BDF(3, 0, 0) INTB PIRQD
181 PCI_BDF(3, 0, 0) INTC PIRQA
182 PCI_BDF(3, 0, 0) INTD PIRQB
183 PCI_BDF(4, 0, 0) INTA PIRQD
184 PCI_BDF(4, 0, 0) INTB PIRQA
185 PCI_BDF(4, 0, 0) INTC PIRQB
186 PCI_BDF(4, 0, 0) INTD PIRQC
192 compatible = "intel,baytrail-fsp";
193 fsp,mrc-init-tseg-size = <0>;
194 fsp,mrc-init-mmio-size = <0x800>;
195 fsp,mrc-init-spd-addr1 = <0xa0>;
196 fsp,mrc-init-spd-addr2 = <0xa2>;
197 fsp,emmc-boot-mode = <2>;
205 fsp,lpss-sio-enable-pci-mode;
217 fsp,igd-dvmt50-pre-alloc = <2>;
218 fsp,aperture-size = <2>;
220 fsp,serial-debug-port-address = <0x3f8>;
221 fsp,serial-debug-port-type = <1>;
222 fsp,scc-enable-pci-mode;
223 fsp,os-selection = <4>;
224 fsp,emmc45-ddr50-enabled;
225 fsp,emmc45-retune-timer-value = <8>;
231 #include "microcode/m0230671117.dtsi"