3 #include <dt-bindings/gpio/x86-gpio.h>
5 /include/ "skeleton.dtsi"
6 /include/ "keyboard.dtsi"
7 /include/ "serial.dtsi"
9 /include/ "tsc_timer.dtsi"
10 /include/ "coreboot_fb.dtsi"
13 model = "Google Link";
14 compatible = "google,link", "intel,celeron-ivybridge";
33 compatible = "intel,core-gen3";
41 compatible = "intel,core-gen3";
49 compatible = "intel,core-gen3";
57 compatible = "intel,core-gen3";
66 stdout-path = "/serial";
74 compatible = "intel,x86-pinctrl";
81 direction = <PIN_INPUT>;
87 direction = <PIN_OUTPUT>;
94 direction = <PIN_INPUT>;
100 direction = <PIN_INPUT>;
106 direction = <PIN_OUTPUT>;
113 direction = <PIN_INPUT>;
120 direction = <PIN_INPUT>;
127 direction = <PIN_INPUT>;
132 gpio-offset = <0 10>;
134 direction = <PIN_INPUT>;
138 gpio-offset = <0 11>;
140 direction = <PIN_INPUT>;
144 gpio-offset = <0 12>;
146 direction = <PIN_INPUT>;
151 gpio-offset = <0 14>;
153 direction = <PIN_INPUT>;
158 gpio-offset = <0 15>;
160 direction = <PIN_INPUT>;
165 gpio-offset = <0 21>;
167 direction = <PIN_INPUT>;
171 gpio-offset = <0 24>;
174 direction = <PIN_OUTPUT>;
178 gpio-offset = <0 28>;
180 direction = <PIN_INPUT>;
184 gpio-offset = <0x30 4>;
186 direction = <PIN_OUTPUT>;
192 gpio-offset = <0x30 9>;
194 direction = <PIN_INPUT>;
199 gpio-offset = <0x30 10>;
201 direction = <PIN_INPUT>;
206 gpio-offset = <0x30 11>;
208 direction = <PIN_INPUT>;
212 gpio-offset = <0x30 25>;
214 direction = <PIN_INPUT>;
218 gpio-offset = <0x30 28>;
220 direction = <PIN_OUTPUT>;
227 compatible = "pci-x86";
228 #address-cells = <3>;
231 ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000
232 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
233 0x01000000 0x0 0x1000 0x1000 0 0xefff>;
236 reg = <0x00000000 0 0 0 0>;
238 compatible = "intel,bd82x6x-northbridge";
239 board-id-gpios = <&gpio_b 9 0>, <&gpio_b 10 0>,
240 <&gpio_b 11 0>, <&gpio_a 10 0>;
243 #address-cells = <1>;
245 elpida_4Gb_1600_x16 {
248 data = [92 10 0b 03 04 19 02 02
249 03 52 01 08 0a 00 fe 00
250 69 78 69 3c 69 11 18 81
251 20 08 3c 3c 01 40 83 81
252 00 00 00 00 00 00 00 00
253 00 00 00 00 00 00 00 00
254 00 00 00 00 00 00 00 00
255 00 00 00 00 0f 11 42 00
256 00 00 00 00 00 00 00 00
257 00 00 00 00 00 00 00 00
258 00 00 00 00 00 00 00 00
259 00 00 00 00 00 00 00 00
260 00 00 00 00 00 00 00 00
261 00 00 00 00 00 00 00 00
262 00 00 00 00 00 02 fe 00
263 11 52 00 00 00 07 7f 37
264 45 42 4a 32 30 55 47 36
265 45 42 55 30 2d 47 4e 2d
266 46 20 30 20 02 fe 00 00
267 00 00 00 00 00 00 00 00
268 00 00 00 00 00 00 00 00
269 00 00 00 00 00 00 00 00
270 00 00 00 00 00 00 00 00
271 00 00 00 00 00 00 00 00
272 00 00 00 00 00 00 00 00
273 00 00 00 00 00 00 00 00
274 00 00 00 00 00 00 00 00
275 00 00 00 00 00 00 00 00
276 00 00 00 00 00 00 00 00
277 00 00 00 00 00 00 00 00
278 00 00 00 00 00 00 00 00
279 00 00 00 00 00 00 00 00];
281 samsung_4Gb_1600_1.35v_x16 {
284 data = [92 11 0b 03 04 19 02 02
285 03 11 01 08 0a 00 fe 00
286 69 78 69 3c 69 11 18 81
287 f0 0a 3c 3c 01 40 83 01
288 00 80 00 00 00 00 00 00
289 00 00 00 00 00 00 00 00
290 00 00 00 00 00 00 00 00
291 00 00 00 00 0f 11 02 00
292 00 00 00 00 00 00 00 00
293 00 00 00 00 00 00 00 00
294 00 00 00 00 00 00 00 00
295 00 00 00 00 00 00 00 00
296 00 00 00 00 00 00 00 00
297 00 00 00 00 00 00 00 00
298 00 00 00 00 00 80 ce 01
299 00 00 00 00 00 00 6a 04
300 4d 34 37 31 42 35 36 37
301 34 42 48 30 2d 59 4b 30
302 20 20 00 00 80 ce 00 00
303 00 00 00 00 00 00 00 00
304 00 00 00 00 00 00 00 00
305 00 00 00 00 00 00 00 00
306 00 00 00 00 00 00 00 00
307 00 00 00 00 00 00 00 00
308 00 00 00 00 00 00 00 00
309 00 00 00 00 00 00 00 00
310 00 00 00 00 00 00 00 00
311 00 00 00 00 00 00 00 00
312 00 00 00 00 00 00 00 00
313 00 00 00 00 00 00 00 00
314 00 00 00 00 00 00 00 00
315 00 00 00 00 00 00 00 00];
317 micron_4Gb_1600_1.35v_x16 {
319 data = [92 11 0b 03 04 19 02 02
320 03 11 01 08 0a 00 fe 00
321 69 78 69 3c 69 11 18 81
322 20 08 3c 3c 01 40 83 05
323 00 00 00 00 00 00 00 00
324 00 00 00 00 00 00 00 00
325 00 00 00 00 00 00 00 00
326 00 00 00 00 0f 01 02 00
327 00 00 00 00 00 00 00 00
328 00 00 00 00 00 00 00 00
329 00 00 00 00 00 00 00 00
330 00 00 00 00 00 00 00 00
331 00 00 00 00 00 00 00 00
332 00 00 00 00 00 00 00 00
333 00 00 00 00 00 80 2c 00
334 00 00 00 00 00 00 ad 75
335 34 4b 54 46 32 35 36 36
336 34 48 5a 2d 31 47 36 45
337 31 20 45 31 80 2c 00 00
338 00 00 00 00 00 00 00 00
339 00 00 00 00 00 00 00 00
340 00 00 00 00 00 00 00 00
341 ff ff ff ff ff ff ff ff
342 ff ff ff ff ff ff ff ff
343 ff ff ff ff ff ff ff ff
344 ff ff ff ff ff ff ff ff
345 ff ff ff ff ff ff ff ff
346 ff ff ff ff ff ff ff ff
347 ff ff ff ff ff ff ff ff
348 ff ff ff ff ff ff ff ff
349 ff ff ff ff ff ff ff ff
350 ff ff ff ff ff ff ff ff];
356 reg = <0x00001000 0 0 0 0>;
357 compatible = "intel,gma";
358 intel,dp_hotplug = <0 0 0x06>;
359 intel,panel-port-select = <1>;
360 intel,panel-power-cycle-delay = <6>;
361 intel,panel-power-up-delay = <2000>;
362 intel,panel-power-down-delay = <500>;
363 intel,panel-power-backlight-on-delay = <2000>;
364 intel,panel-power-backlight-off-delay = <2000>;
365 intel,cpu-backlight = <0x00000200>;
366 intel,pch-backlight = <0x04000000>;
370 reg = <0x0000b000 0 0 0 0>;
371 compatible = "intel,me";
376 reg = <0x0000d000 0 0 0 0>;
377 compatible = "ehci-pci";
381 reg = <0x0000e800 0 0 0 0>;
382 compatible = "ehci-pci";
386 reg = <0x0000f800 0 0 0 0>;
387 compatible = "intel,bd82x6x", "intel,pch9";
389 #address-cells = <1>;
391 intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b
392 0x80 0x80 0x80 0x80>;
393 intel,gpi-routing = <0 0 0 0 0 0 0 2
395 /* Enable EC SMI source */
396 intel,alt-gp-smi-enable = <0x0100>;
399 #address-cells = <1>;
401 compatible = "intel,ich9-spi";
405 #address-cells = <1>;
408 compatible = "winbond,w25q64",
410 memory-map = <0xff800000 0x00800000>;
412 label = "rw-mrc-cache";
413 reg = <0x003e0000 0x00010000>;
420 compatible = "intel,ich6-gpio";
429 compatible = "intel,ich6-gpio";
438 compatible = "intel,ich6-gpio";
447 compatible = "intel,bd82x6x-lpc";
448 #address-cells = <1>;
451 intel,gen-dec = <0x800 0xfc 0x900 0xfc>;
453 compatible = "google,cros-ec";
454 reg = <0x204 1 0x200 1 0x880 0x80>;
457 * Describes the flash memory within
460 #address-cells = <1>;
463 reg = <0x08000000 0x20000>;
464 erase-value = <0xff>;
471 compatible = "intel,pantherpoint-ahci";
472 reg = <0x0000fa00 0 0 0 0>;
474 intel,sata-mode = "ahci";
475 intel,sata-port-map = <1>;
476 intel,sata-port0-gen3-tx = <0x00880a7f>;
480 compatible = "intel,ich-i2c";
481 reg = <0x0000fb00 0 0 0 0>;
487 reg = <0xfed40000 0x5000>;
488 compatible = "infineon,slb9635lpc";
495 #include "microcode/m12306a9_0000001b.dtsi"