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Merge branch 'u-boot/master' into 'u-boot-arm/master'
[u-boot] / arch / x86 / dts / galileo.dts
1 /*
2  * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6
7 /dts-v1/;
8
9 #include <dt-bindings/mrc/quark.h>
10 #include <dt-bindings/interrupt-router/intel-irq.h>
11
12 /include/ "skeleton.dtsi"
13
14 / {
15         model = "Intel Galileo";
16         compatible = "intel,galileo", "intel,quark";
17
18         aliases {
19                 spi0 = "/spi";
20         };
21
22         config {
23                 silent_console = <0>;
24         };
25
26         chosen {
27                 stdout-path = &pciuart0;
28         };
29
30         mrc {
31                 compatible = "intel,quark-mrc";
32                 flags = <MRC_FLAG_SCRAMBLE_EN>;
33                 dram-width = <DRAM_WIDTH_X8>;
34                 dram-speed = <DRAM_FREQ_800>;
35                 dram-type = <DRAM_TYPE_DDR3>;
36                 rank-mask = <DRAM_RANK(0)>;
37                 chan-mask = <DRAM_CHANNEL(0)>;
38                 chan-width = <DRAM_CHANNEL_WIDTH_X16>;
39                 addr-mode = <DRAM_ADDR_MODE0>;
40                 refresh-rate = <DRAM_REFRESH_RATE_785US>;
41                 sr-temp-range = <DRAM_SRT_RANGE_NORMAL>;
42                 ron-value = <DRAM_RON_34OHM>;
43                 rtt-nom-value = <DRAM_RTT_NOM_120OHM>;
44                 rd-odt-value = <DRAM_RD_ODT_OFF>;
45                 dram-density = <DRAM_DENSITY_1G>;
46                 dram-cl = <6>;
47                 dram-ras = <0x0000927c>;
48                 dram-wtr = <0x00002710>;
49                 dram-rrd = <0x00002710>;
50                 dram-faw = <0x00009c40>;
51         };
52
53         pci {
54                 #address-cells = <3>;
55                 #size-cells = <2>;
56                 compatible = "intel,pci";
57                 device_type = "pci";
58
59                 pciuart0: uart@14,5 {
60                         compatible = "pci8086,0936.00",
61                                         "pci8086,0936",
62                                         "pciclass,070002",
63                                         "pciclass,0700",
64                                         "x86-uart";
65                         reg = <0x0000a500 0x0 0x0 0x0 0x0
66                                0x0200a510 0x0 0x0 0x0 0x0>;
67                         reg-shift = <2>;
68                         clock-frequency = <44236800>;
69                         current-speed = <115200>;
70                 };
71
72                 irq-router@1f,0 {
73                         reg = <0x0000f800 0 0 0 0>;
74                         compatible = "intel,irq-router";
75                         intel,pirq-config = "pci";
76                         intel,pirq-link = <0x60 8>;
77                         intel,pirq-mask = <0xdef8>;
78                         intel,pirq-routing = <
79                                 PCI_BDF(0, 20, 0) INTA PIRQE
80                                 PCI_BDF(0, 20, 1) INTB PIRQF
81                                 PCI_BDF(0, 20, 2) INTC PIRQG
82                                 PCI_BDF(0, 20, 3) INTD PIRQH
83                                 PCI_BDF(0, 20, 4) INTA PIRQE
84                                 PCI_BDF(0, 20, 5) INTB PIRQF
85                                 PCI_BDF(0, 20, 6) INTC PIRQG
86                                 PCI_BDF(0, 20, 7) INTD PIRQH
87                                 PCI_BDF(0, 21, 0) INTA PIRQE
88                                 PCI_BDF(0, 21, 1) INTB PIRQF
89                                 PCI_BDF(0, 21, 2) INTC PIRQG
90                         >;
91                 };
92         };
93
94         gpioa {
95                 compatible = "intel,ich6-gpio";
96                 u-boot,dm-pre-reloc;
97                 reg = <0 0x20>;
98                 bank-name = "A";
99         };
100
101         gpiob {
102                 compatible = "intel,ich6-gpio";
103                 u-boot,dm-pre-reloc;
104                 reg = <0x20 0x20>;
105                 bank-name = "B";
106         };
107
108         spi {
109                 #address-cells = <1>;
110                 #size-cells = <0>;
111                 compatible = "intel,ich-spi";
112                 spi-flash@0 {
113                         #size-cells = <1>;
114                         #address-cells = <1>;
115                         reg = <0>;
116                         compatible = "winbond,w25q64", "spi-flash";
117                         memory-map = <0xff800000 0x00800000>;
118                 };
119         };
120
121 };