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x86: Add support for the samus chromebook
[u-boot] / arch / x86 / dts / qemu-x86_i440fx.dts
1 /*
2  * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6
7 /dts-v1/;
8
9 #include <dt-bindings/interrupt-router/intel-irq.h>
10
11 /include/ "skeleton.dtsi"
12 /include/ "serial.dtsi"
13 /include/ "keyboard.dtsi"
14 /include/ "rtc.dtsi"
15 /include/ "tsc_timer.dtsi"
16
17 / {
18         model = "QEMU x86 (I440FX)";
19         compatible = "qemu,x86";
20
21         config {
22                 silent_console = <0>;
23         };
24
25         chosen {
26                 stdout-path = "/serial";
27         };
28
29         cpus {
30                 #address-cells = <1>;
31                 #size-cells = <0>;
32
33                 cpu@0 {
34                         device_type = "cpu";
35                         compatible = "cpu-qemu";
36                         reg = <0>;
37                         intel,apic-id = <0>;
38                 };
39         };
40
41         tsc-timer {
42                 clock-frequency = <1000000000>;
43         };
44
45         pci {
46                 compatible = "pci-x86";
47                 #address-cells = <3>;
48                 #size-cells = <2>;
49                 u-boot,dm-pre-reloc;
50                 ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000
51                         0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
52                         0x01000000 0x0 0x2000 0x2000 0 0xe000>;
53
54                 pch@1,0 {
55                         reg = <0x00000800 0 0 0 0>;
56                         compatible = "intel,pch7";
57
58                         irq-router {
59                                 compatible = "intel,irq-router";
60                                 intel,pirq-config = "pci";
61                                 intel,pirq-link = <0x60 4>;
62                                 intel,pirq-mask = <0x0e40>;
63                                 intel,pirq-routing = <
64                                         /* PIIX UHCI */
65                                         PCI_BDF(0, 1, 2) INTD PIRQD
66                                         /* e1000 NIC */
67                                         PCI_BDF(0, 3, 0) INTA PIRQC
68                                 >;
69                         };
70                 };
71         };
72
73 };