2 * Copyright (C) 2013 Google Inc.
3 * Copyright (C) 2016 Bin Meng <bmeng.cn@gmail.com>
5 * Modified from coreboot src/soc/intel/baytrail/acpi/gpio.asl
7 * SPDX-License-Identifier: GPL-2.0+
10 /* SouthCluster GPIO */
17 Name(RBUF, ResourceTemplate()
19 Memory32Fixed(ReadWrite, 0, 0x1000, RMEM)
20 Interrupt(ResourceConsumer, Level, ActiveLow, Shared, , ,)
28 CreateDwordField(^RBUF, ^RMEM._BAS, RBAS)
29 Add(IO_BASE_ADDRESS, IO_BASE_OFFSET_GPSCORE, RBAS)
39 /* NorthCluster GPIO */
46 Name(RBUF, ResourceTemplate()
48 Memory32Fixed(ReadWrite, 0, 0x1000, RMEM)
49 Interrupt(ResourceConsumer, Level, ActiveLow, Shared, , ,)
57 CreateDwordField(^RBUF, ^RMEM._BAS, RBAS)
58 Add(IO_BASE_ADDRESS, IO_BASE_OFFSET_GPNCORE, RBAS)
75 Name(RBUF, ResourceTemplate()
77 Memory32Fixed(ReadWrite, 0, 0x1000, RMEM)
78 Interrupt(ResourceConsumer, Level, ActiveLow, Shared, , ,)
86 CreateDwordField(^RBUF, ^RMEM._BAS, RBAS)
87 Add(IO_BASE_ADDRESS, IO_BASE_OFFSET_GPSSUS, RBAS)