git.sur5r.net Git - u-boot/blob - arch/x86/include/asm/arch-broadwell/gpio.h

   1 /*
   2  * Copyright (c) 2016 Google, Inc
   3  *
   4  * From Coreboot src/soc/intel/broadwell/include/soc/gpio.h
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0
   7  */
   8
   9 #ifndef __ASM_ARCH_GPIO
  10 #define __ASM_ARCH_GPIO
  11
  12 #define GPIO_PER_BANK   32
  13 #define GPIO_BANKS      3
  14
  15 struct broadwell_bank_platdata {
  16         uint16_t base_addr;
  17         const char *bank_name;
  18         int bank;
  19 };
  20
  21 /* PCH-LP GPIOBASE Registers */
  22 struct pch_lp_gpio_regs {
  23         u32 own[GPIO_BANKS];
  24         u32 reserved0;
  25
  26         u16 pirq_to_ioxapic;
  27         u16 reserved1[3];
  28         u32 blink;
  29         u32 ser_blink;
  30
  31         u32 ser_blink_cmdsts;
  32         u32 ser_blink_data;
  33         u16 gpi_nmi_en;
  34         u16 gpi_nmi_sts;
  35         u32 reserved2;
  36
  37         u32 gpi_route[GPIO_BANKS];
  38         u32 reserved3;
  39
  40         u32 reserved4[4];
  41
  42         u32 alt_gpi_smi_sts;
  43         u32 alt_gpi_smi_en;
  44         u32 reserved5[2];
  45
  46         u32 rst_sel[GPIO_BANKS];
  47         u32 reserved6;
  48
  49         u32 reserved9[3];
  50         u32 gpio_gc;
  51
  52         u32 gpi_is[GPIO_BANKS];
  53         u32 reserved10;
  54
  55         u32 gpi_ie[GPIO_BANKS];
  56         u32 reserved11;
  57
  58         u32 reserved12[24];
  59
  60         struct {
  61                 u32 conf_a;
  62                 u32 conf_b;
  63         } config[GPIO_BANKS * GPIO_PER_BANK];
  64 };
  65 check_member(pch_lp_gpio_regs, gpi_ie[0], 0x90);
  66 check_member(pch_lp_gpio_regs, config[0], 0x100);
  67
  68 enum {
  69         CONFA_MODE_SHIFT        = 0,
  70         CONFA_MODE_GPIO         = 1 << CONFA_MODE_SHIFT,
  71
  72         CONFA_DIR_SHIFT         = 2,
  73         CONFA_DIR_INPUT         = 1 << CONFA_DIR_SHIFT,
  74
  75         CONFA_INVERT_SHIFT      = 3,
  76         CONFA_INVERT            = 1 << CONFA_INVERT_SHIFT,
  77
  78         CONFA_TRIGGER_SHIFT     = 4,
  79         CONFA_TRIGGER_LEVEL     = 1 << CONFA_TRIGGER_SHIFT,
  80
  81         CONFA_LEVEL_SHIFT       = 30,
  82         CONFA_LEVEL_HIGH        = 1UL << CONFA_LEVEL_SHIFT,
  83
  84         CONFA_OUTPUT_SHIFT      = 31,
  85         CONFA_OUTPUT_HIGH       = 1UL << CONFA_OUTPUT_SHIFT,
  86
  87         CONFB_SENSE_SHIFT       = 2,
  88         CONFB_SENSE_DISABLE     = 1 << CONFB_SENSE_SHIFT,
  89 };
  90
  91 #endif