1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (c) 2011 The Chromium OS Authors.
6 #ifndef __X86_CACHE_H__
7 #define __X86_CACHE_H__
10 * If CONFIG_SYS_CACHELINE_SIZE is defined use it for DMA alignment. Otherwise
11 * use 64-bytes, a safe default for x86.
13 #ifndef CONFIG_SYS_CACHELINE_SIZE
14 #define CONFIG_SYS_CACHELINE_SIZE 64
17 #define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE
19 static inline void wbinvd(void)
21 asm volatile ("wbinvd" : : : "memory");
24 static inline void invd(void)
26 asm volatile("invd" : : : "memory");
29 /* Enable caches and write buffer */
30 void enable_caches(void);
32 /* Disable caches and write buffer */
33 void disable_caches(void);
35 #endif /* __X86_CACHE_H__ */