2 * (C) Copyright 2015 Miao Yan <yanmiaobest@gmail.com>
4 * SPDX-License-Identifier: GPL-2.0+
10 #define FW_CONTROL_PORT 0x510
11 #define FW_DATA_PORT 0x511
12 #define FW_DMA_PORT_LOW 0x514
13 #define FW_DMA_PORT_HIGH 0x518
15 enum qemu_fwcfg_items {
16 FW_CFG_SIGNATURE = 0x00,
19 FW_CFG_RAM_SIZE = 0x03,
20 FW_CFG_NOGRAPHIC = 0x04,
21 FW_CFG_NB_CPUS = 0x05,
22 FW_CFG_MACHINE_ID = 0x06,
23 FW_CFG_KERNEL_ADDR = 0x07,
24 FW_CFG_KERNEL_SIZE = 0x08,
25 FW_CFG_KERNEL_CMDLINE = 0x09,
26 FW_CFG_INITRD_ADDR = 0x0a,
27 FW_CFG_INITRD_SIZE = 0x0b,
28 FW_CFG_BOOT_DEVICE = 0x0c,
30 FW_CFG_BOOT_MENU = 0x0e,
31 FW_CFG_MAX_CPUS = 0x0f,
32 FW_CFG_KERNEL_ENTRY = 0x10,
33 FW_CFG_KERNEL_DATA = 0x11,
34 FW_CFG_INITRD_DATA = 0x12,
35 FW_CFG_CMDLINE_ADDR = 0x13,
36 FW_CFG_CMDLINE_SIZE = 0x14,
37 FW_CFG_CMDLINE_DATA = 0x15,
38 FW_CFG_SETUP_ADDR = 0x16,
39 FW_CFG_SETUP_SIZE = 0x17,
40 FW_CFG_SETUP_DATA = 0x18,
41 FW_CFG_FILE_DIR = 0x19,
42 FW_CFG_FILE_FIRST = 0x20,
43 FW_CFG_WRITE_CHANNEL = 0x4000,
44 FW_CFG_ARCH_LOCAL = 0x8000,
45 FW_CFG_INVALID = 0xffff,
48 #define FW_CFG_FILE_SLOTS 0x10
49 #define FW_CFG_MAX_ENTRY (FW_CFG_FILE_FIRST + FW_CFG_FILE_SLOTS)
50 #define FW_CFG_ENTRY_MASK ~(FW_CFG_WRITE_CHANNEL | FW_CFG_ARCH_LOCAL)
52 #define FW_CFG_MAX_FILE_PATH 56
54 #define QEMU_FW_CFG_SIGNATURE (('Q' << 24) | ('E' << 16) | ('M' << 8) | 'U')
56 #define FW_CFG_DMA_ERROR (1 << 0)
57 #define FW_CFG_DMA_READ (1 << 1)
58 #define FW_CFG_DMA_SKIP (1 << 2)
59 #define FW_CFG_DMA_SELECT (1 << 3)
61 #define FW_CFG_DMA_ENABLED (1 << 1)
67 char name[FW_CFG_MAX_FILE_PATH];
72 struct fw_cfg_file files[];
75 struct fw_cfg_dma_access {
82 * Initialize QEMU fw_cfg interface
84 void qemu_fwcfg_init(void);
87 * Get system cpu number
89 * @return: cpu number in system
91 int qemu_fwcfg_online_cpus(void);