2 * Taken from the linux kernel file of the same name
5 * Graeme Russ, <graeme.russ@gmail.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 #ifndef _ASM_X86_MSR_H
24 #define _ASM_X86_MSR_H
26 #include <asm/msr-index.h>
30 #include <linux/types.h>
31 #include <linux/ioctl.h>
33 #define X86_IOC_RDMSR_REGS _IOWR('c', 0xA0, __u32[8])
34 #define X86_IOC_WRMSR_REGS _IOWR('c', 0xA1, __u32[8])
38 #include <asm/errno.h>
57 struct msr_regs_info {
62 static inline unsigned long long native_read_tscp(unsigned int *aux)
64 unsigned long low, high;
65 asm volatile(".byte 0x0f,0x01,0xf9"
66 : "=a" (low), "=d" (high), "=c" (*aux));
67 return low | ((u64)high << 32);
71 * both i386 and x86_64 returns 64-bit value in edx:eax, but gcc's "A"
72 * constraint has different meanings. For i386, "A" means exactly
73 * edx:eax, while for x86_64 it doesn't mean rdx:rax or edx:eax. Instead,
74 * it means rax *or* rdx.
77 #define DECLARE_ARGS(val, low, high) unsigned low, high
78 #define EAX_EDX_VAL(val, low, high) ((low) | ((u64)(high) << 32))
79 #define EAX_EDX_ARGS(val, low, high) "a" (low), "d" (high)
80 #define EAX_EDX_RET(val, low, high) "=a" (low), "=d" (high)
82 #define DECLARE_ARGS(val, low, high) unsigned long long val
83 #define EAX_EDX_VAL(val, low, high) (val)
84 #define EAX_EDX_ARGS(val, low, high) "A" (val)
85 #define EAX_EDX_RET(val, low, high) "=A" (val)
88 static inline unsigned long long native_read_msr(unsigned int msr)
90 DECLARE_ARGS(val, low, high);
92 asm volatile("rdmsr" : EAX_EDX_RET(val, low, high) : "c" (msr));
93 return EAX_EDX_VAL(val, low, high);
96 static inline void native_write_msr(unsigned int msr,
97 unsigned low, unsigned high)
99 asm volatile("wrmsr" : : "c" (msr), "a"(low), "d" (high) : "memory");
102 extern unsigned long long native_read_tsc(void);
104 extern int native_rdmsr_safe_regs(u32 regs[8]);
105 extern int native_wrmsr_safe_regs(u32 regs[8]);
107 static inline unsigned long long native_read_pmc(int counter)
109 DECLARE_ARGS(val, low, high);
111 asm volatile("rdpmc" : EAX_EDX_RET(val, low, high) : "c" (counter));
112 return EAX_EDX_VAL(val, low, high);
115 #ifdef CONFIG_PARAVIRT
116 #include <asm/paravirt.h>
120 * Access to machine-specific registers (available on 586 and better only)
121 * Note: the rd* operations modify the parameters directly (without using
122 * pointer indirection), this allows gcc to optimize better
125 #define rdmsr(msr, val1, val2) \
127 u64 __val = native_read_msr((msr)); \
128 (void)((val1) = (u32)__val); \
129 (void)((val2) = (u32)(__val >> 32)); \
132 static inline void wrmsr(unsigned msr, unsigned low, unsigned high)
134 native_write_msr(msr, low, high);
137 #define rdmsrl(msr, val) \
138 ((val) = native_read_msr((msr)))
140 #define wrmsrl(msr, val) \
141 native_write_msr((msr), (u32)((u64)(val)), (u32)((u64)(val) >> 32))
143 /* rdmsr with exception handling */
144 #define rdmsr_safe(msr, p1, p2) \
147 u64 __val = native_read_msr_safe((msr), &__err); \
148 (*p1) = (u32)__val; \
149 (*p2) = (u32)(__val >> 32); \
153 static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)
159 gprs[7] = 0x9c5a203a;
161 err = native_rdmsr_safe_regs(gprs);
163 *p = gprs[0] | ((u64)gprs[2] << 32);
168 static inline int wrmsrl_amd_safe(unsigned msr, unsigned long long val)
175 gprs[7] = 0x9c5a203a;
177 return native_wrmsr_safe_regs(gprs);
180 static inline int rdmsr_safe_regs(u32 regs[8])
182 return native_rdmsr_safe_regs(regs);
185 static inline int wrmsr_safe_regs(u32 regs[8])
187 return native_wrmsr_safe_regs(regs);
190 #define rdtscl(low) \
191 ((low) = (u32)__native_read_tsc())
193 #define rdtscll(val) \
194 ((val) = __native_read_tsc())
196 #define rdpmc(counter, low, high) \
198 u64 _l = native_read_pmc((counter)); \
200 (high) = (u32)(_l >> 32); \
203 #define rdtscp(low, high, aux) \
205 unsigned long long _val = native_read_tscp(&(aux)); \
207 (high) = (u32)(_val >> 32); \
210 #define rdtscpll(val, aux) (val) = native_read_tscp(&(aux))
212 #endif /* !CONFIG_PARAVIRT */
215 #define checking_wrmsrl(msr, val) wrmsr_safe((msr), (u32)(val), \
218 #define write_tsc(val1, val2) wrmsr(MSR_IA32_TSC, (val1), (val2))
220 #define write_rdtscp_aux(val) wrmsr(MSR_TSC_AUX, (val), 0)
222 struct msr *msrs_alloc(void);
223 void msrs_free(struct msr *msrs);
226 int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
227 int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
228 void rdmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs);
229 void wrmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs);
230 int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
231 int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
232 int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]);
233 int wrmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]);
235 #endif /* CONFIG_SMP */
236 #endif /* __KERNEL__ */
237 #endif /* __ASSEMBLY__ */
238 #endif /* _ASM_X86_MSR_H */