2 * Taken from the linux kernel file of the same name
5 * Graeme Russ, <graeme.russ@gmail.com>
7 * SPDX-License-Identifier: GPL-2.0+
10 #ifndef _ASM_X86_MSR_H
11 #define _ASM_X86_MSR_H
13 #include <asm/msr-index.h>
17 #include <linux/types.h>
18 #include <linux/ioctl.h>
20 #define X86_IOC_RDMSR_REGS _IOWR('c', 0xA0, __u32[8])
21 #define X86_IOC_WRMSR_REGS _IOWR('c', 0xA1, __u32[8])
25 #include <asm/errno.h>
44 struct msr_regs_info {
49 static inline unsigned long long native_read_tscp(unsigned int *aux)
51 unsigned long low, high;
52 asm volatile(".byte 0x0f,0x01,0xf9"
53 : "=a" (low), "=d" (high), "=c" (*aux));
54 return low | ((u64)high << 32);
58 * both i386 and x86_64 returns 64-bit value in edx:eax, but gcc's "A"
59 * constraint has different meanings. For i386, "A" means exactly
60 * edx:eax, while for x86_64 it doesn't mean rdx:rax or edx:eax. Instead,
61 * it means rax *or* rdx.
64 #define DECLARE_ARGS(val, low, high) unsigned low, high
65 #define EAX_EDX_VAL(val, low, high) ((low) | ((u64)(high) << 32))
66 #define EAX_EDX_ARGS(val, low, high) "a" (low), "d" (high)
67 #define EAX_EDX_RET(val, low, high) "=a" (low), "=d" (high)
69 #define DECLARE_ARGS(val, low, high) unsigned long long val
70 #define EAX_EDX_VAL(val, low, high) (val)
71 #define EAX_EDX_ARGS(val, low, high) "A" (val)
72 #define EAX_EDX_RET(val, low, high) "=A" (val)
75 static inline __attribute__((no_instrument_function))
76 unsigned long long native_read_msr(unsigned int msr)
78 DECLARE_ARGS(val, low, high);
80 asm volatile("rdmsr" : EAX_EDX_RET(val, low, high) : "c" (msr));
81 return EAX_EDX_VAL(val, low, high);
84 static inline void native_write_msr(unsigned int msr,
85 unsigned low, unsigned high)
87 asm volatile("wrmsr" : : "c" (msr), "a"(low), "d" (high) : "memory");
90 extern unsigned long long native_read_tsc(void);
92 extern int native_rdmsr_safe_regs(u32 regs[8]);
93 extern int native_wrmsr_safe_regs(u32 regs[8]);
95 static inline unsigned long long native_read_pmc(int counter)
97 DECLARE_ARGS(val, low, high);
99 asm volatile("rdpmc" : EAX_EDX_RET(val, low, high) : "c" (counter));
100 return EAX_EDX_VAL(val, low, high);
103 #ifdef CONFIG_PARAVIRT
104 #include <asm/paravirt.h>
108 * Access to machine-specific registers (available on 586 and better only)
109 * Note: the rd* operations modify the parameters directly (without using
110 * pointer indirection), this allows gcc to optimize better
113 #define rdmsr(msr, val1, val2) \
115 u64 __val = native_read_msr((msr)); \
116 (void)((val1) = (u32)__val); \
117 (void)((val2) = (u32)(__val >> 32)); \
120 static inline void wrmsr(unsigned msr, unsigned low, unsigned high)
122 native_write_msr(msr, low, high);
125 #define rdmsrl(msr, val) \
126 ((val) = native_read_msr((msr)))
128 #define wrmsrl(msr, val) \
129 native_write_msr((msr), (u32)((u64)(val)), (u32)((u64)(val) >> 32))
131 /* rdmsr with exception handling */
132 #define rdmsr_safe(msr, p1, p2) \
135 u64 __val = native_read_msr_safe((msr), &__err); \
136 (*p1) = (u32)__val; \
137 (*p2) = (u32)(__val >> 32); \
141 static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)
147 gprs[7] = 0x9c5a203a;
149 err = native_rdmsr_safe_regs(gprs);
151 *p = gprs[0] | ((u64)gprs[2] << 32);
156 static inline int wrmsrl_amd_safe(unsigned msr, unsigned long long val)
163 gprs[7] = 0x9c5a203a;
165 return native_wrmsr_safe_regs(gprs);
168 static inline int rdmsr_safe_regs(u32 regs[8])
170 return native_rdmsr_safe_regs(regs);
173 static inline int wrmsr_safe_regs(u32 regs[8])
175 return native_wrmsr_safe_regs(regs);
178 #define rdtscl(low) \
179 ((low) = (u32)__native_read_tsc())
181 #define rdtscll(val) \
182 ((val) = __native_read_tsc())
184 #define rdpmc(counter, low, high) \
186 u64 _l = native_read_pmc((counter)); \
188 (high) = (u32)(_l >> 32); \
191 #define rdtscp(low, high, aux) \
193 unsigned long long _val = native_read_tscp(&(aux)); \
195 (high) = (u32)(_val >> 32); \
198 #define rdtscpll(val, aux) (val) = native_read_tscp(&(aux))
200 #endif /* !CONFIG_PARAVIRT */
203 #define checking_wrmsrl(msr, val) wrmsr_safe((msr), (u32)(val), \
206 #define write_tsc(val1, val2) wrmsr(MSR_IA32_TSC, (val1), (val2))
208 #define write_rdtscp_aux(val) wrmsr(MSR_TSC_AUX, (val), 0)
210 struct msr *msrs_alloc(void);
211 void msrs_free(struct msr *msrs);
214 int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
215 int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
216 void rdmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs);
217 void wrmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs);
218 int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
219 int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
220 int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]);
221 int wrmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]);
223 #endif /* CONFIG_SMP */
224 #endif /* __KERNEL__ */
225 #endif /* __ASSEMBLY__ */
226 #endif /* _ASM_X86_MSR_H */