3 * Daniel Engström, Omicron Ceti AB, daniel@omicron.se
5 * SPDX-License-Identifier: GPL-2.0+
13 /* bus mapping constants (used for PCI core initialization) */
14 #define PCI_REG_ADDR 0xcf8
15 #define PCI_REG_DATA 0xcfc
17 #define PCI_CFG_EN 0x80000000
21 #define DEFINE_PCI_DEVICE_TABLE(_table) \
22 const struct pci_device_id _table[]
24 struct pci_controller;
26 void pci_setup_type1(struct pci_controller *hose);
29 * Simple PCI access routines - these work from either the early PCI hose
30 * or the 'real' one, created after U-Boot has memory available
32 unsigned int x86_pci_read_config8(pci_dev_t dev, unsigned where);
33 unsigned int x86_pci_read_config16(pci_dev_t dev, unsigned where);
34 unsigned int x86_pci_read_config32(pci_dev_t dev, unsigned where);
36 void x86_pci_write_config8(pci_dev_t dev, unsigned where, unsigned value);
37 void x86_pci_write_config16(pci_dev_t dev, unsigned where, unsigned value);
38 void x86_pci_write_config32(pci_dev_t dev, unsigned where, unsigned value);
40 int pci_x86_read_config(struct udevice *bus, pci_dev_t bdf, uint offset,
41 ulong *valuep, enum pci_size_t size);
43 int pci_x86_write_config(struct udevice *bus, pci_dev_t bdf, uint offset,
44 ulong value, enum pci_size_t size);
47 * Assign IRQ number to a PCI device
49 * This function assigns IRQ for a PCI device. If the device does not exist
50 * or does not require interrupts then this function has no effect.
52 * @bus: PCI bus number
53 * @device: PCI device number
54 * @irq: An array of IRQ numbers that are assigned to INTA through
55 * INTD of this PCI device.
57 void pci_assign_irqs(int bus, int device, u8 irq[4]);
59 #endif /* __ASSEMBLY__ */
61 #endif /* _PCI_I386_H_ */