2 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
4 * Ported from coreboot src/arch/x86/include/arch/pirq_routing.h
6 * SPDX-License-Identifier: GPL-2.0+
9 #ifndef _PIRQ_ROUTING_H_
10 #define _PIRQ_ROUTING_H_
13 * This is the maximum number on interrupt entries that a PCI device may have.
14 * This is NOT the number of slots or devices in the system
15 * This is NOT the number of entries in the PIRQ table
17 * This tells us that in the PIRQ table, we are going to have 4 link-bitmap
18 * entries per PCI device which is fixed at 4: INTA, INTB, INTC, and INTD.
20 * CAUTION: If you change this, PIRQ routing will not work correctly.
22 #define MAX_INTX_ENTRIES 4
24 #define PIRQ_SIGNATURE \
25 (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
26 #define PIRQ_VERSION 0x0100
28 struct __packed irq_info {
29 u8 bus; /* Bus number */
30 u8 devfn; /* Device and function number */
32 u8 link; /* IRQ line ID, 0=not routed */
33 u16 bitmap; /* Available IRQs */
34 } irq[MAX_INTX_ENTRIES];
35 u8 slot; /* Slot number, 0=onboard */
39 struct __packed irq_routing_table {
40 u32 signature; /* PIRQ_SIGNATURE */
41 u16 version; /* PIRQ_VERSION */
42 u16 size; /* Table size in bytes */
43 u8 rtr_bus; /* busno of the interrupt router */
44 u8 rtr_devfn; /* devfn of the interrupt router */
45 u16 exclusive_irqs; /* IRQs devoted exclusively to PCI usage */
46 u16 rtr_vendor; /* Vendor ID of the interrupt router */
47 u16 rtr_device; /* Device ID of the interrupt router */
50 u8 checksum; /* Modulo 256 checksum must give zero */
51 struct irq_info slots[CONFIG_IRQ_SLOT_COUNT];
55 * get_irq_slot_count() - Get the number of entries in the irq_info table
57 * This calculates the number of entries for the irq_info table.
59 * @rt: pointer to the base address of the struct irq_info
60 * @return: number of entries
62 static inline int get_irq_slot_count(struct irq_routing_table *rt)
64 return (rt->size - 32) / sizeof(struct irq_info);
68 * pirq_check_irq_routed() - Check whether an IRQ is routed to 8259 PIC
70 * This function checks whether an IRQ is routed to 8259 PIC for a given link.
72 * Note: this function should be provided by the platform codes, as the
73 * implementation of interrupt router may be different.
75 * @link: link number which represents a PIRQ
76 * @irq: the 8259 IRQ number
77 * @return: true if the irq is already routed to 8259 for a given link,
80 bool pirq_check_irq_routed(int link, u8 irq);
83 * pirq_translate_link() - Translate a link value
85 * This function translates a platform-specific link value to a link number.
86 * On Intel platforms, the link value is normally a offset into the PCI
87 * configuration space into the legacy bridge.
89 * Note: this function should be provided by the platform codes, as the
90 * implementation of interrupt router may be different.
92 * @link: platform-specific link value
93 * @return: link number which represents a PIRQ
95 int pirq_translate_link(int link);
98 * pirq_assign_irq() - Assign an IRQ to a PIRQ link
100 * This function assigns the IRQ to a PIRQ link so that the PIRQ is routed to
103 * Note: this function should be provided by the platform codes, as the
104 * implementation of interrupt router may be different.
106 * @link: link number which represents a PIRQ
107 * @irq: IRQ to which the PIRQ is routed
109 void pirq_assign_irq(int link, u8 irq);
112 * pirq_route_irqs() - Route PIRQs to 8259 PIC
114 * This function configures all PCI devices' interrupt pins and maps them to
115 * PIRQs and finally 8259 PIC. The routed irq number is written to interrupt
116 * line register in the configuration space of the PCI device for OS to use.
117 * The configuration source is taken from a struct irq_info table, the format
118 * of which is defined in PIRQ routing table spec and PCI BIOS spec.
120 * @irq: pointer to the base address of the struct irq_info
121 * @num: number of entries in the struct irq_info
123 void pirq_route_irqs(struct irq_info *irq, int num);
126 * copy_pirq_routing_table() - Copy a PIRQ routing table
128 * This helper function copies the given PIRQ routing table to a given address.
129 * Before copying, it does several sanity tests against the PIRQ routing table.
130 * It also fixes up the table checksum and align the given address to a 16 byte
131 * boundary to meet the PIRQ routing table spec requirements.
133 * @addr: address to store the copied PIRQ routing table
134 * @rt: pointer to the PIRQ routing table to copy from
135 * @return: end address of the copied PIRQ routing table
137 u32 copy_pirq_routing_table(u32 addr, struct irq_routing_table *rt);
139 #endif /* _PIRQ_ROUTING_H_ */