2 ; C128 generic definitions. Stolen from Elite128
6 ; ---------------------------------------------------------------------------
7 ; Zero page, Commodore stuff
9 TXTPTR := $3D ; Pointer into BASIC source code
10 TIME := $A0 ; 60HZ clock
11 FNAM_LEN := $B7 ; Length of filename
12 SECADR := $B9 ; Secondary address
13 DEVNUM := $BA ; Device number
14 FNAM := $BB ; Address of filename
15 FNAM_BANK := $C7 ; Bank for filename
16 KEY_COUNT := $D0 ; Number of keys in input buffer
17 FKEY_COUNT := $D1 ; Characters for function key
18 MODE := $D7 ; 40-/80-column mode (bit 7: 80 columns)
19 CURS_X := $EC ; Cursor column
20 CURS_Y := $EB ; Cursor row
21 SCREEN_PTR := $E0 ; Pointer to current char in text screen
22 CRAM_PTR := $E2 ; Pointer to current char in color RAM
25 RVS := $F3 ; Reverse output flag
26 SCROLL := $F8 ; Disable scrolling flag
28 BASIC_BUF := $200 ; Location of command-line
29 BASIC_BUF_LEN = 162 ; Maximum length of command-line
31 FETCH := $2A2 ; Fetch subroutine in RAM
32 FETVEC := $2AA ; Vector patch location for FETCH
33 STASH := $2AF ; Stash routine in RAM
34 STAVEC := $2B9 ; Vector patch location for STASH
35 IRQInd := $2FD ; JMP $0000 -- used as indirect IRQ vector
36 PALFLAG := $A03 ; $FF=PAL, $00=NTSC
37 INIT_STATUS := $A04 ; Flags: Reset/Restore initiation status
38 FKEY_LEN := $1000 ; Function key lengths
39 FKEY_TEXT := $100A ; Function key texts
43 KBDREPEATDELAY := $28c
45 ; ---------------------------------------------------------------------------
59 ; ---------------------------------------------------------------------------
67 ; ---------------------------------------------------------------------------
89 VIC_SPR_EXP_Y := $D017
90 VIC_SPR_EXP_X := $D01D
91 VIC_SPR_MCOLOR := $D01C
92 VIC_SPR_BG_PRIO := $D01B
94 VIC_SPR_MCOLOR0 := $D025
95 VIC_SPR_MCOLOR1 := $D026
97 VIC_SPR0_COLOR := $D027
98 VIC_SPR1_COLOR := $D028
99 VIC_SPR2_COLOR := $D029
100 VIC_SPR3_COLOR := $D02A
101 VIC_SPR4_COLOR := $D02B
102 VIC_SPR5_COLOR := $D02C
103 VIC_SPR6_COLOR := $D02D
104 VIC_SPR7_COLOR := $D02E
114 VIC_VIDEO_ADR := $D018
116 VIC_IRR := $D019 ; Interrupt request register
117 VIC_IMR := $D01A ; Interrupt mask register
119 VIC_BORDERCOLOR := $D020
120 VIC_BG_COLOR0 := $D021
121 VIC_BG_COLOR1 := $D022
122 VIC_BG_COLOR2 := $D023
123 VIC_BG_COLOR3 := $D024
126 VIC_KBD_128 := $D02F ; Extended kbd bits (visible in 64 mode)
127 VIC_CLK_128 := $D030 ; Clock rate register (visible in 64 mode)
130 ; ---------------------------------------------------------------------------
167 ; ---------------------------------------------------------------------------
168 ; I/O: VDC (128 only)
170 VDC_INDEX := $D600 ; register address port
171 VDC_DATA := $D601 ; data port
174 VDC_DATA_HI = 18 ; video RAM address (big endian)
177 VDC_RAM_RW = 31 ; RAM port
179 ; ---------------------------------------------------------------------------
180 ; I/O: Complex Interface Adapters
183 CIA1_PRA := $DC00 ; Port A
184 CIA1_PRB := $DC01 ; Port B
185 CIA1_DDRA := $DC02 ; Data direction register for port A
186 CIA1_DDRB := $DC03 ; Data direction register for port B
187 CIA1_TA := $DC04 ; 16-bit timer A
188 CIA1_TB := $DC06 ; 16-bit timer B
189 CIA1_TOD10 := $DC08 ; Time-of-day tenths of a second
190 CIA1_TODSEC := $DC09 ; Time-of-day seconds
191 CIA1_TODMIN := $DC0A ; Time-of-day minutes
192 CIA1_TODHR := $DC0B ; Time-of-day hours
193 CIA1_SDR := $DC0C ; Serial data register
194 CIA1_ICR := $DC0D ; Interrupt control register
195 CIA1_CRA := $DC0E ; Control register for timer A
196 CIA1_CRB := $DC0F ; Control register for timer B
214 ; ---------------------------------------------------------------------------
218 MMU_CFG_CC65 := %00001110 ; Bank 0 with kernal ROM
219 MMU_CFG_RAM0 := %00111111 ; Bank 0 full RAM
220 MMU_CFG_RAM1 := %01111111 ; Bank 1 full RAM
221 MMU_CFG_RAM2 := %10111111 ; Bank 2 full RAM
222 MMU_CFG_RAM3 := %11111111 ; Bank 3 full RAM
223 MMU_CFG_IFROM := %01010111 ; Bank 1 with Internal Function RAM/ROM
224 MMU_CFG_EFROM := %01101011 ; Bank 1 with External Function RAM/ROM
226 ; ---------------------------------------------------------------------------
229 SCPU_VIC_Bank1 := $D075
232 SCPU_EnableRegs := $D07E
233 SCPU_DisableRegs:= $D07F